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Treat some DRC Errors as Warnings #5

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leoheck opened this issue May 30, 2020 · 15 comments
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Treat some DRC Errors as Warnings #5

leoheck opened this issue May 30, 2020 · 15 comments
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enhancement New feature or request

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@leoheck
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leoheck commented May 30, 2020

image

Does Kiplot have any way to waive some kind of errors?

For instance, maybe it will be better to consider things like:

  • Pad to close to pad
  • Contreyards overlap
    as warnings, since some times it is needed to sacrifice them.

So a nice console output would be also print the step results on the screen since user don't have these in hands to fix them when they fail (well at least at this moment, since I was not able to finish your CI flow yet)

@leoheck
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leoheck commented May 30, 2020

An example of the usage here.

Sometimes we are intentionally reusing space by overlapping parts (2 resistors here), for instance, indicating they should not be used at the same time.

So, being able to ignore some DRC violations is a good thing to have if Kiplot does not have it yet.

image

@set-soft
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The report from KiCad is stored so you can consult it. Reporting every thing to the output isn't a good choice, just enable debug messages with -vv and you'll see what I mean. But I'm tagging it as a possible enhancement.
About your particular issue with optional components. I solve it defining special footprints for this purpose. The real problem is with KiCad internals. Note that if you can't ignore a DRC error with KiCad trying to do it from outside doesn't look like an easy task. I'll think about it.

@set-soft set-soft self-assigned this May 30, 2020
@leoheck
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leoheck commented May 30, 2020

Reporting every thing to the output isn't a good choice,

Sure, I understand this very well

I solve it defining special footprints for this purpose.

Yes, this can be done. It is not good, especially when working with more people like in my case. They use to use the laziest approach, using things they know only.

Well, my idea is that the user can add in the yml the types of errors that he can ignore (so he will know what he is doing). And then Kiplot can parse the report.erc checking errors outside of that list.
If only errors in the filter-out list are shown it can exit with 0. So fabrications output (in your CI example) can be generated.

@set-soft
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set-soft commented Jun 5, 2020

Hi @leoheck!
Could you provide a file with the DRC errors you want to filter?

@leoheck leoheck changed the title DRC Errors Treat some DRC Errors as Warnings Jun 5, 2020
@leoheck
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leoheck commented Jun 5, 2020

Hello @set-soft

For instance, ErrType(45): Courtyards overlap might be waived here in this use case.
Maybe something more specific could use the parts involved (like C16 and C19) to indicate the DRC error more specifically. Instead of just ignoring all errors with the same type.

** Created on 2020-06-05 11:16:21 **

** Found 2 DRC errors **
ErrType(45): Courtyards overlap
    @(144.361 mm, 101.752 mm): Footprint C16 on F.Cu
    @(144.825 mm, 101.244 mm): Footprint C19 on F.Cu
ErrType(45): Courtyards overlap
    @(159.885 mm, 97.663 mm): Footprint R4 on F.Cu
    @(160.393 mm, 97.191 mm): Footprint C21 on F.Cu

** Found 0 unconnected pads **

** End of Report **

One of the errors above, for instance, happens here. When 2 capacitors/resistors share the same pad. This was the designer's decision so it should not be an error. Here the intention was to give only one option while soldering the parts. Maybe in v6. Kicad will have a better DRC/ERC system to help us on this feature.

image

@set-soft
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set-soft commented Jun 5, 2020

Thanks!
I'm taking a look at the possibility to add filters

@leoheck
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leoheck commented Jun 5, 2020

Nice, let me know if I can help with something or maybe something that is blocking you.

@set-soft
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set-soft commented Jun 5, 2020

I added something to the "drc_errors" branch:
https://github.com/INTI-CMNB/kicad-automation-scripts/tree/drc_errors

You have to create a file with the errors you want to filter, for the above report the file could contain:

45,Footprint C16
45,Footprint R4

Then you can pass it to pcbnew_do using -f option.
I have to clean, document and add tests. Then I'll see how to add it to KiPlot.

@leoheck
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leoheck commented Jun 5, 2020

This is pretty interesting. Let me see It I got it right.

To ignore this single error

ErrType(45): Courtyards overlap
    @(144.361 mm, 101.752 mm): Footprint C16 on F.Cu
    @(144.825 mm, 101.244 mm): Footprint C19 on F.Cu

I have to declare 2 items

45,Footprint C16
45,Footprint R4

Also, maybe a good idea is to have a way to add comments to this file as in:

# Ignore counteryard errors because C16 and R4 have overlapping pads.
45,Footprint C16
45,Footprint R4

Got it, it should come after run_drc

pcbnew_do run_drc -f drc_filter.cfg board.kicad_pcb ./outputs

@set-soft
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set-soft commented Jun 6, 2020

To ignore this single error

ErrType(45): Courtyards overlap
    @(144.361 mm, 101.752 mm): Footprint C16 on F.Cu
    @(144.825 mm, 101.244 mm): Footprint C19 on F.Cu

I have to declare 2 items

45,Footprint C16
45,Footprint R4

Nope, the first line will ignore the above mentioned error.
It matches error type 45 that contains "Footprint C16"
The second line ignores the other error, the error 45 that contains "Footprint R4"

Also, maybe a good idea is to have a way to add comments to this file as in:

# Ignore counteryard errors because C16 and R4 have overlapping pads.
45,Footprint C16
45,Footprint R4

Any line starting with # is already ignored ;-)

Got it, it should come after run_drc

pcbnew_do run_drc -f drc_filter.cfg board.kicad_pcb ./outputs

Yes this is an option for the run_drc sub-command.

@leoheck
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leoheck commented Jun 6, 2020

Thanks, should I add an issue on kiplot to add a test to integrate this?

@set-soft
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set-soft commented Jun 6, 2020

Thanks, should I add an issue on kiplot to add a test to integrate this?

Yes, do it. I'll add it but if you add a request people will know about it.

@set-soft
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set-soft commented Jun 6, 2020

I added one question here, for you. :)
johnbeard/kiplot#17

Ok, I replied there.

@set-soft
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set-soft commented Jun 6, 2020

  • Added support to run_erc
  • Added a few tests
  • Merged it with master
  • The KiPlot addition is opened

Time to close it

@set-soft set-soft closed this as completed Jun 6, 2020
@leoheck
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leoheck commented Jun 6, 2020

Just giving you the feedback. Here the DRC step is passing, using pcbnew_do and ignoring intentional DRC issues.

Screenshot from 2020-06-06 18-57-28

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