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sync naxSoftware Scala CI #107: Commit 38f68c5 pushed by Dolu1990
February 2, 2024 18:06 3m 37s dev
dev
February 2, 2024 18:06 3m 37s
Finalize pma and fix perf counter write / flush hazard Scala CI #106: Commit e4b1478 pushed by Dolu1990
February 2, 2024 17:54 4m 59s dev
dev
February 2, 2024 17:54 4m 59s
Move from hex to elf + cleanup Scala CI #105: Commit 9f83a97 pushed by Dolu1990
February 1, 2024 13:42 3m 51s dev
dev
February 1, 2024 13:42 3m 51s
fix compilation Scala CI #104: Commit 60dee15 pushed by Dolu1990
February 1, 2024 08:35 3m 34s dev
dev
February 1, 2024 08:35 3m 34s
cleaning Scala CI #103: Commit 847289b pushed by Dolu1990
January 31, 2024 17:40 3m 26s dev
dev
January 31, 2024 17:40 3m 26s
MicroSoc++ Scala CI #102: Commit 31a5eb4 pushed by Dolu1990
January 31, 2024 17:38 3m 11s dev
dev
January 31, 2024 17:38 3m 11s
Add MicroSoc (wip) Scala CI #101: Commit 349a7bb pushed by Dolu1990
January 31, 2024 16:13 3m 17s dev
dev
January 31, 2024 16:13 3m 17s
Merge branch 'LsuL1' into dev Scala CI #100: Commit fa4610d pushed by Dolu1990
January 31, 2024 09:26 3m 9s dev
dev
January 31, 2024 09:26 3m 9s
fix #1298 Fix CtrlLink ignore ready priority Scala CI #99: Commit a73d755 pushed by Dolu1990
January 31, 2024 09:25 3m 10s dev
dev
January 31, 2024 09:25 3m 10s
Merge branch 'LsuL1' into dev Scala CI #98: Commit fa4610d pushed by Dolu1990
January 30, 2024 20:47 3m 36s dev
dev
January 30, 2024 20:47 3m 36s
Merge branch 'dev' into LsuL1 Scala CI #97: Commit 9573cf7 pushed by Dolu1990
January 30, 2024 20:47 3m 15s LsuL1
LsuL1
January 30, 2024 20:47 3m 15s
lsu l1 pass all regressions Scala CI #96: Commit 9b0ce03 pushed by Dolu1990
January 30, 2024 20:39 3m 19s LsuL1
LsuL1
January 30, 2024 20:39 3m 19s
Cleaned up Agu LOAD/STORE/ATOMIC decoding Scala CI #95: Commit 91c5a90 pushed by Dolu1990
January 30, 2024 14:04 3m 8s LsuL1
LsuL1
January 30, 2024 14:04 3m 8s
regression seems ok Scala CI #94: Commit bde752c pushed by Dolu1990
January 30, 2024 13:12 3m 51s LsuL1
LsuL1
January 30, 2024 13:12 3m 51s
Add dirty bypass Scala CI #93: Commit c352faa pushed by Dolu1990
January 30, 2024 09:29 3m 40s LsuL1
LsuL1
January 30, 2024 09:29 3m 40s
lsu l1 nearly done Scala CI #92: Commit 1919d69 pushed by Dolu1990
January 29, 2024 20:45 3m 8s LsuL1
LsuL1
January 29, 2024 20:45 3m 8s
#1254 Move hardmap to SpinalHDL Scala CI #91: Commit 274cbab pushed by Dolu1990
January 29, 2024 10:22 2m 50s LsuL1
LsuL1
January 29, 2024 10:22 2m 50s
Update README.md Scala CI #90: Commit 4198ada pushed by Dolu1990
January 27, 2024 09:52 2m 57s dev
dev
January 27, 2024 09:52 2m 57s
lsu l1 fence i pass Scala CI #89: Commit 736b294 pushed by Dolu1990
January 26, 2024 17:07 3m 16s LsuL1
LsuL1
January 26, 2024 17:07 3m 16s
LsuL1 non coherent LR/SC implemented and pass tests Scala CI #88: Commit d77e716 pushed by Dolu1990
January 26, 2024 14:41 3m 28s LsuL1
LsuL1
January 26, 2024 14:41 3m 28s
LsuPlugin store RS2 late attempt Scala CI #87: Commit ac29bd9 pushed by Dolu1990
January 26, 2024 13:42 3m 14s LsuL1
LsuL1
January 26, 2024 13:42 3m 14s
Fix btb learn Scala CI #86: Commit abf7ee2 pushed by Dolu1990
January 26, 2024 11:38 3m 14s LsuL1
LsuL1
January 26, 2024 11:38 3m 14s
LsuL1 now implement optional bypass Scala CI #85: Commit 4ca54cb pushed by Dolu1990
January 26, 2024 10:44 3m 21s LsuL1
LsuL1
January 26, 2024 10:44 3m 21s
Fix lsu l1 multi way Scala CI #84: Commit 2400500 pushed by Dolu1990
January 26, 2024 10:00 3m 19s LsuL1
LsuL1
January 26, 2024 10:00 3m 19s
lsu l1 + io passed dhrystone Scala CI #83: Commit 4fafa02 pushed by Dolu1990
January 26, 2024 08:48 2m 57s LsuL1
LsuL1
January 26, 2024 08:48 2m 57s