sync

SpinalHDL · Mar 23, 2024 · a7573ae · a7573ae
1 parent 480b3c1
commit a7573ae
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Showing 2 changed files with 8 additions and 1 deletion.
diff --git a/src/main/scala/vexiiriscv/schedule/DispatchPlugin.scala b/src/main/scala/vexiiriscv/schedule/DispatchPlugin.scala
@@ -204,7 +204,7 @@ class DispatchPlugin(var dispatchAt : Int,
               decodeSpec += Masked(uop.uop.key) -> (v.from >= hazardUntilMax).mux(Masked.one, Masked.zero)
             }
           }
-          val skip = Symplify(c.ctx.uop, decodeSpec, 1).as(Bool()) //TODO verify with LsuPlugin store usage at execute id 2
+          val skip = Symplify(c.ctx.uop, decodeSpec, 1).as(Bool())
 
           for (spec <- bypassedSpecs.values) yield new Area {
             for (l <- spec.el.getLayers(); uop <- l.uops.values) {

diff --git a/src/test/scala/vexiiriscv/scratchpad/Synt.scala b/src/test/scala/vexiiriscv/scratchpad/Synt.scala
@@ -991,4 +991,11 @@ debug_jtag ->
 Artix 7 -> 90 Mhz 1427 LUT 1608 FF
 Artix 7 -> 193 Mhz 1579 LUT 1608 FF
 
+
+fullPerf ->
+Artix 7 -> 87 Mhz 4354 LUT 3050 FF
+Artix 7 -> 127 Mhz 4663 LUT 3061 FF
+fullPerf2 ->
+Artix 7 -> 90 Mhz 4308 LUT 3419 FF
+Artix 7 -> 156 Mhz 4813 LUT 3593 FF
  */