From 755e6ffa0d4627880fcd053435df295e780a742a Mon Sep 17 00:00:00 2001 From: Sihyung Woo <75494566+sihyung-maxim@users.noreply.github.com> Date: Tue, 2 Apr 2024 19:54:08 -0500 Subject: [PATCH] feat(PeriphDrivers): Add SPI v2 support to MAX32690 (#964) Co-authored-by: Jake Carter --- Examples/MAX32690/SPI_v2/.cproject | 81 ++ Examples/MAX32690/SPI_v2/.project | 26 + .../SPI_v2/.settings/language.settings.xml | 15 + .../org.eclipse.cdt.codan.core.prefs | 93 ++ .../.settings/org.eclipse.cdt.core.prefs | 15 + Examples/MAX32690/SPI_v2/.vscode/README.md | 47 + .../SPI_v2/.vscode/c_cpp_properties.json | 53 + Examples/MAX32690/SPI_v2/.vscode/flash.gdb | 17 + Examples/MAX32690/SPI_v2/.vscode/launch.json | 133 ++ .../MAX32690/SPI_v2/.vscode/settings.json | 77 ++ Examples/MAX32690/SPI_v2/.vscode/tasks.json | 115 ++ Examples/MAX32690/SPI_v2/Makefile | 382 ++++++ Examples/MAX32690/SPI_v2/README.md | 67 + Examples/MAX32690/SPI_v2/SPI_v2.launch | 62 + Examples/MAX32690/SPI_v2/main.c | 236 ++++ Examples/MAX32690/SPI_v2/project.mk | 13 + .../Boards/MAX32690/EvKit_V1/examples.txt | 1 + .../CMSIS/Device/Maxim/GCC/mxc_version.mk | 2 +- Libraries/FCL/fcl.mk | 49 - Libraries/FCL/fcl_files.mk | 49 - Libraries/FCL/libfcl.mk | 49 - .../PeriphDrivers/Include/MAX32690/mxc_pins.h | 2 +- .../PeriphDrivers/Include/MAX32690/spi.h | 863 ++++++++----- Libraries/PeriphDrivers/Source/SPI/spi_me18.c | 11 +- .../PeriphDrivers/Source/SPI/spi_me18_v2.c | 1075 +++++++++++++++++ .../PeriphDrivers/Source/SYS/pins_me18.c | 2 +- Libraries/PeriphDrivers/libPeriphDriver.mk | 20 +- Libraries/PeriphDrivers/max32690_files.mk | 10 + Libraries/PeriphDrivers/periphdriver.mk | 39 +- USERGUIDE.md | 6 + mxc_version.h | 2 +- 31 files changed, 3158 insertions(+), 454 deletions(-) create mode 100644 Examples/MAX32690/SPI_v2/.cproject create mode 100644 Examples/MAX32690/SPI_v2/.project create mode 100644 Examples/MAX32690/SPI_v2/.settings/language.settings.xml create mode 100644 Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.codan.core.prefs create mode 100644 Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.core.prefs create mode 100644 Examples/MAX32690/SPI_v2/.vscode/README.md create mode 100644 Examples/MAX32690/SPI_v2/.vscode/c_cpp_properties.json create mode 100644 Examples/MAX32690/SPI_v2/.vscode/flash.gdb create mode 100644 Examples/MAX32690/SPI_v2/.vscode/launch.json create mode 100644 Examples/MAX32690/SPI_v2/.vscode/settings.json create mode 100644 Examples/MAX32690/SPI_v2/.vscode/tasks.json create mode 100644 Examples/MAX32690/SPI_v2/Makefile create mode 100644 Examples/MAX32690/SPI_v2/README.md create mode 100644 Examples/MAX32690/SPI_v2/SPI_v2.launch create mode 100644 Examples/MAX32690/SPI_v2/main.c create mode 100644 Examples/MAX32690/SPI_v2/project.mk create mode 100644 Libraries/PeriphDrivers/Source/SPI/spi_me18_v2.c diff --git a/Examples/MAX32690/SPI_v2/.cproject b/Examples/MAX32690/SPI_v2/.cproject new file mode 100644 index 00000000000..74f66908027 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.cproject @@ -0,0 +1,81 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Examples/MAX32690/SPI_v2/.project b/Examples/MAX32690/SPI_v2/.project new file mode 100644 index 00000000000..d38022bbc46 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.project @@ -0,0 +1,26 @@ + + + SPI_v2 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/Examples/MAX32690/SPI_v2/.settings/language.settings.xml b/Examples/MAX32690/SPI_v2/.settings/language.settings.xml new file mode 100644 index 00000000000..d32717b6f37 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.settings/language.settings.xml @@ -0,0 +1,15 @@ + + + + + + + + + + + + + + + diff --git a/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.codan.core.prefs b/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.codan.core.prefs new file mode 100644 index 00000000000..59c0b37ba75 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.codan.core.prefs @@ -0,0 +1,93 @@ +eclipse.preferences.version=1 +org.eclipse.cdt.codan.checkers.errnoreturn=Warning +org.eclipse.cdt.codan.checkers.errnoreturn.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"No return\\")",implicit\=>false} +org.eclipse.cdt.codan.checkers.errreturnvalue=Error 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+org.eclipse.cdt.codan.internal.checkers.VariableResolutionProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Symbol is not resolved\\")"} +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem=-Error +org.eclipse.cdt.codan.internal.checkers.VirtualMethodCallProblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>true,RUN_ON_INC_BUILD\=>true,RUN_ON_FILE_OPEN\=>false,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>"@suppress(\\"Virtual method call in constructor/destructor\\")"} +org.eclipse.cdt.qt.core.qtproblem=Warning +org.eclipse.cdt.qt.core.qtproblem.params={launchModes\=>{RUN_ON_FULL_BUILD\=>false,RUN_ON_INC_BUILD\=>false,RUN_ON_FILE_OPEN\=>true,RUN_ON_FILE_SAVE\=>false,RUN_AS_YOU_TYPE\=>true,RUN_ON_DEMAND\=>true},suppression_comment\=>null} diff --git a/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.core.prefs b/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.core.prefs new file mode 100644 index 00000000000..ec8eee4b1d7 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.settings/org.eclipse.cdt.core.prefs @@ -0,0 +1,15 @@ +eclipse.preferences.version=1 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/BOARD/value=EvKit_V1 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/operation=replace +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/GCC_PREFIX/value=arm-none-eabi- +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/PROJECT/value=SPI_v2 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/delimiter=; +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/operation=append +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/TARGET/value=MAX32690 +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/append=true +environment/project/cdt.managedbuild.toolchain.gnu.cross.base.1028364529/appendContributed=true diff --git a/Examples/MAX32690/SPI_v2/.vscode/README.md b/Examples/MAX32690/SPI_v2/.vscode/README.md new file mode 100644 index 00000000000..58733e941c7 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/README.md @@ -0,0 +1,47 @@ +# VSCode-Maxim + +_(If you're viewing this document from within Visual Studio Code you can press `CTRL+SHIFT+V` to open a Markdown preview window.)_ + +## Quick Links + +* [MSDK User Guide](https://analog-devices-msdk.github.io/msdk/USERGUIDE/) +* [VSCode-Maxim Github](https://github.com/Analog-Devices-MSDK/VSCode-Maxim) + +## Introduction + +VSCode-Maxim is a set of [Visual Studio Code](https://code.visualstudio.com/) project configurations and utilities for enabling embedded development for [Analog Device's MSDK](https://github.com/Analog-Devices-MSDK/msdk) and the [MAX32xxx/MAX78xxx microcontrollers](https://www.analog.com/en/product-category/microcontrollers.html). + +The following features are supported: + +* Code editing with intellisense down to the register level +* Code compilation with the ability to easily re-target a project for different microcontrollers and boards +* Flashing programs +* GUI and command-line debugging + +## Dependencies + +* [Visual Studio Code](https://code.visualstudio.com/) + * [C/C++ VSCode Extension](https://marketplace.visualstudio.com/items?itemName=ms-vscode.cpptools) + * [Cortex-Debug Extension](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug) +* [Analog Devices MSDK](https://analog-devices-msdk.github.io/msdk/) + +## Installation + +Install the MSDK, then set `"MAXIM_PATH"` in your _user_ VS Code settings. + +See [Getting Started with Visual Studio Code](https://analog-devices-msdk.github.io/msdk/USERGUIDE/#getting-started-with-visual-studio-code) in the MSDK User Guide for detailed instructions. + +## Usage + +See the [MSDK User Guide](https://analog-devices-msdk.github.io/msdk/USERGUIDE/#visual-studio-code) for detailed usage info. + +## Issue Tracker + +Bug reports, feature requests, and contributions are welcome via the [issues](https://github.com/Analog-Devices-MSDK/VSCode-Maxim/issues) tracker on Github. + +New issues should contain _at minimum_ the following information: + +* Visual Studio Code version #s (see `Help -> About`) +* C/C++ Extension version # +* Target microcontroller and evaluation platform +* The projects `.vscode` folder and `Makefile` (where applicable). Standard compression formats such as `.zip`, `.rar`, `.tar.gz`, etc. are all acceptable. diff --git a/Examples/MAX32690/SPI_v2/.vscode/c_cpp_properties.json b/Examples/MAX32690/SPI_v2/.vscode/c_cpp_properties.json new file mode 100644 index 00000000000..dfbed47b581 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/c_cpp_properties.json @@ -0,0 +1,53 @@ +{ + "configurations": [ + { + "name": "Win32", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc.exe", + "browse": { + "path": [ + "${default}" + ] + } + }, + { + "name": "Linux", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc", + "browse": { + "path": [ + "${default}" + ] + } + }, + { + "name": "Mac", + "includePath": [ + "${default}" + ], + "defines": [ + "${default}" + ], + "intelliSenseMode": "gcc-arm", + "compilerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gcc", + "browse": { + "path": [ + "${default}" + ] + } + } + ], + "version": 4 +} \ No newline at end of file diff --git a/Examples/MAX32690/SPI_v2/.vscode/flash.gdb b/Examples/MAX32690/SPI_v2/.vscode/flash.gdb new file mode 100644 index 00000000000..8f22801a47d --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/flash.gdb @@ -0,0 +1,17 @@ +define flash_m4 + set architecture armv7e-m + set remotetimeout 10 + target remote | openocd -c "gdb_port pipe;log_output flash.log" -s $arg0/scripts -f interface/$arg1 -f target/$arg2 -c "init; reset halt" + load + compare-sections + monitor reset halt +end + +define flash_m4_run + set architecture armv7e-m + set remotetimeout 10 + target remote | openocd -c "gdb_port pipe;log_output flash.log" -s $arg0/scripts -f interface/$arg1 -f target/$arg2 -c "init; reset halt" + load + compare-sections + monitor resume +end diff --git a/Examples/MAX32690/SPI_v2/.vscode/launch.json b/Examples/MAX32690/SPI_v2/.vscode/launch.json new file mode 100644 index 00000000000..01fe5199048 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/launch.json @@ -0,0 +1,133 @@ +{ + "configurations": [ + { + "name": "Debug Arm (Cortex-debug)", + "cwd":"${workspaceRoot}", + "executable": "${workspaceFolder}/build/${config:program_file}", + "loadFiles": ["${workspaceFolder}/build/${config:program_file}"], + "symbolFiles": [{ + "file": "${workspaceFolder}/build/${config:symbol_file}" + }], + "request": "launch", + "type": "cortex-debug", + "servertype": "openocd", + "linux": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "serverpath": "${config:OCD_path}/openocd", + }, + "windows": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb.exe", + "serverpath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "gdbPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "serverpath": "${config:OCD_path}/openocd", + }, + "searchDir": ["${config:OCD_path}/scripts"], + "configFiles": ["interface/${config:M4_OCD_interface_file}", "target/${config:M4_OCD_target_file}"], + "interface": "swd", + "runToEntryPoint": "main", + "svdFile": "${config:MAXIM_PATH}/Libraries/CMSIS/Device/Maxim/${config:target}/Include/${config:target}.svd" + }, + { + "name": "GDB (Arm M4)", + "type": "cppdbg", + "request": "launch", + "program": "${workspaceFolder}/build/${config:program_file}", + "args": [], + "stopAtEntry": true, + "cwd": "${workspaceFolder}", + "environment": [], + "externalConsole": false, + "MIMode": "gdb", + "linux": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "debugServerPath": "${config:OCD_path}/openocd", + }, + "windows": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb.exe", + "debugServerPath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "miDebuggerPath": "${config:ARM_GCC_path}/bin/arm-none-eabi-gdb", + "debugServerPath": "${config:OCD_path}/bin/openocd", + }, + "logging": { + "exceptions": true, + "trace": false, + "traceResponse": false, + "engineLogging": false + }, + "miDebuggerServerAddress": "localhost:3333", + "debugServerArgs": "-s ${config:OCD_path}/scripts -f interface/${config:M4_OCD_interface_file} -f target/${config:M4_OCD_target_file} -c \"init; reset halt\"", + "serverStarted": "Info : Listening on port 3333 for gdb connections", + "filterStderr": true, + "targetArchitecture": "arm", + "customLaunchSetupCommands": [ + {"text":"-list-features"} + ], + "setupCommands": [ + { "text":"set logging overwrite on"}, + { "text":"set logging file debug-arm.log"}, + { "text":"set logging on"}, + { "text":"cd ${workspaceFolder}" }, + { "text":"exec-file build/${config:program_file}" }, + { "text":"symbol-file build/${config:symbol_file}" }, + { "text":"target remote localhost:3333" }, + { "text":"monitor reset halt" }, + { "text":"set $pc=Reset_Handler"}, + { "text":"b main" } + ] + }, + { + "name": "GDB (RISC-V)", + "type": "cppdbg", + "request": "launch", + "program": "${workspaceFolder}/buildrv/${config:program_file}", + "args": [], + "stopAtEntry": false, + "cwd": "${workspaceFolder}", + "environment": [], + "externalConsole": false, + "MIMode": "gdb", + "linux": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb", + "debugServerPath": "${config:OCD_path}/openocd", + }, + "windows": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb.exe", + "debugServerPath": "${config:OCD_path}/openocd.exe", + }, + "osx": { + "miDebuggerPath": "${config:xPack_GCC_path}/bin/riscv-none-elf-gdb", + "debugServerPath": "${config:OCD_path}/bin/openocd", + }, + "logging": { + "exceptions": true, + "trace": false, + "traceResponse": false, + "engineLogging": false + }, + "miDebuggerServerAddress": "localhost:3334", + "debugServerArgs": "-c \"gdb_port 3334\" -s ${config:OCD_path}/scripts -f interface/${config:RV_OCD_interface_file} -f target/${config:RV_OCD_target_file}", + "serverStarted": "Info : Listening on port 3334 for gdb connections", + "filterStderr": true, + "customLaunchSetupCommands": [ + {"text":"-list-features"} + ], + "targetArchitecture": "arm", + "setupCommands": [ + { "text":"set logging overwrite on"}, + { "text":"set logging file debug-riscv.log"}, + { "text":"set logging on"}, + { "text":"cd ${workspaceFolder}" }, + { "text": "set architecture riscv:rv32", "ignoreFailures": false }, + { "text":"exec-file build/${config:program_file}", "ignoreFailures": false }, + { "text":"symbol-file buildrv/${config:symbol_file}", "ignoreFailures": false }, + { "text":"target remote localhost:3334" }, + { "text":"b main" }, + { "text": "set $pc=Reset_Handler","ignoreFailures": false } + ] + } + ] +} diff --git a/Examples/MAX32690/SPI_v2/.vscode/settings.json b/Examples/MAX32690/SPI_v2/.vscode/settings.json new file mode 100644 index 00000000000..261356c2468 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/settings.json @@ -0,0 +1,77 @@ +{ + "terminal.integrated.env.windows": { + "Path":"${config:OCD_path};${config:ARM_GCC_path}/bin;${config:xPack_GCC_path}/bin;${config:MSYS_path}/usr/bin;${config:Make_path};${env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + "terminal.integrated.defaultProfile.windows": "Command Prompt", + + "terminal.integrated.env.linux": { + "PATH":"${config:OCD_path}:${config:ARM_GCC_path}/bin:${config:xPack_GCC_path}/bin:${config:Make_path}:${env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + "terminal.integrated.env.osx": { + "PATH":"${config:OCD_path}/bin:${config:ARM_GCC_path}/bin:${config:xPack_GCC_path}/bin:${config:Make_path}:{env:PATH}", + "MAXIM_PATH":"${config:MAXIM_PATH}" + }, + + "target":"MAX32690", + "board":"EvKit_V1", + + "project_name":"${workspaceFolderBasename}", + + "program_file":"${config:project_name}.elf", + "symbol_file":"${config:program_file}", + + "M4_OCD_interface_file":"cmsis-dap.cfg", + "M4_OCD_target_file":"max32690.cfg", + "RV_OCD_interface_file":"ftdi/olimex-arm-usb-ocd-h.cfg", + "RV_OCD_target_file":"${config:target}_riscv.cfg", + + "v_Arm_GCC":"10.3", + "v_xPack_GCC":"12.2.0-3.1", + + "OCD_path":"${config:MAXIM_PATH}/Tools/OpenOCD", + "ARM_GCC_path":"${config:MAXIM_PATH}/Tools/GNUTools/${config:v_Arm_GCC}", + "xPack_GCC_path":"${config:MAXIM_PATH}/Tools/xPack/riscv-none-elf-gcc/${config:v_xPack_GCC}", + "Make_path":"${config:MAXIM_PATH}/Tools/GNUTools/Make", + "MSYS_path":"${config:MAXIM_PATH}/Tools/MSYS2", + + "C_Cpp.default.includePath": [ + "${workspaceFolder}", + "${workspaceFolder}/**", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/Include", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/${config:board}/Include", + "${config:MAXIM_PATH}/Libraries/CMSIS/Device/Maxim/${config:target}/Include", + "${config:MAXIM_PATH}/Libraries/CMSIS/Include", + "${config:ARM_GCC_path}/arm-none-eabi/include", + "${config:ARM_GCC_path}/lib/gcc/arm-none-eabi/${config:v_Arm_GCC}/include", + "${config:MAXIM_PATH}/Libraries/PeriphDrivers/Include/${config:target}", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Camera", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/ExtMemory", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/LED", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PMIC", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PushButton", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Touchscreen" + ], + "C_Cpp.default.browse.path": [ + "${workspaceFolder}", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/Source", + "${config:MAXIM_PATH}/Libraries/Boards/${config:target}/${config:board}/Source", + "${config:MAXIM_PATH}/Libraries/PeriphDrivers/Source", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Camera", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Display", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/LED", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PMIC", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/PushButton", + "${config:MAXIM_PATH}/Libraries/MiscDrivers/Touchscreen", + "${config:MAXIM_PATH}/Libraries/MiscDrivers" + ], + "C_Cpp.default.defines": [ + + ], + "C_Cpp.default.forcedInclude": [ + "${workspaceFolder}/build/project_defines.h" + ] +} + diff --git a/Examples/MAX32690/SPI_v2/.vscode/tasks.json b/Examples/MAX32690/SPI_v2/.vscode/tasks.json new file mode 100644 index 00000000000..e95445e2b3e --- /dev/null +++ b/Examples/MAX32690/SPI_v2/.vscode/tasks.json @@ -0,0 +1,115 @@ +{ + "version": "2.0.0", + "tasks": [ + { + "label": "build", + "type": "shell", + "command": "make -r -j 8 --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -r -j 8 --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "clean", + "type": "shell", + "command": "make -j 8 clean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -j 8 clean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "clean-periph", + "type": "shell", + "command": "make -j 8 distclean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}", + "osx":{ + "command": "source ~/.zshrc && make -j 8 distclean --output-sync=target --no-print-directory TARGET=${config:target} BOARD=${config:board} MAXIM_PATH=${config:MAXIM_PATH} MAKE=make PROJECT=${config:project_name}" + }, + "group": "build", + "problemMatcher": [] + }, + { + "label": "flash", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--cd=\"${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "-x=\"${workspaceFolder}/.vscode/flash.gdb\"", + "--ex=\"flash_m4 ${config:OCD_path} ${config:M4_OCD_interface_file} ${config:M4_OCD_target_file}\"", + "--batch" + ], + "group": "build", + "problemMatcher": [], + "dependsOn":["build"] + }, + { + "label": "flash & run", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--cd=\"${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "-x=\"${workspaceFolder}/.vscode/flash.gdb\"", + "--ex=\"flash_m4_run ${config:OCD_path} ${config:M4_OCD_interface_file} ${config:M4_OCD_target_file}\"", + "--batch" + ], + "group": "build", + "problemMatcher": [], + "dependsOn":["build"] + }, + { + "label": "erase flash", + "type": "shell", + "command": "openocd", + "args": [ + "-s", "${config:OCD_path}/scripts", + "-f", "interface/${config:M4_OCD_interface_file}", + "-f", "target/${config:M4_OCD_target_file}", + "-c", "\"init; reset halt; max32xxx mass_erase 0;\"", + "-c", "exit" + ], + "group":"build", + "problemMatcher": [], + "dependsOn":[] + }, + { + "label": "openocd (m4)", + "type": "shell", + "command": "openocd", + "args": [ + "-s", + "${config:OCD_path}/scripts", + "-f", + "interface/${config:M4_OCD_interface_file}", + "-f", + "target/${config:M4_OCD_target_file}", + "-c", + "\"init; reset halt\"" + ], + "problemMatcher": [], + "dependsOn":[] + }, + { + "label": "gdb (m4)", + "type": "shell", + "command": "arm-none-eabi-gdb", + "args": [ + "--ex=\"cd ${workspaceFolder}\"", + "--se=\"build/${config:program_file}\"", + "--symbols=build/${config:symbol_file}", + "--ex=\"target remote localhost:3333\"", + "--ex=\"monitor reset halt\"", + "--ex=\"b main\"", + "--ex=\"c\"" + ], + "problemMatcher": [], + "dependsOn":[] + }, + ] +} \ No newline at end of file diff --git a/Examples/MAX32690/SPI_v2/Makefile b/Examples/MAX32690/SPI_v2/Makefile new file mode 100644 index 00000000000..8b4903d8c6d --- /dev/null +++ b/Examples/MAX32690/SPI_v2/Makefile @@ -0,0 +1,382 @@ +############################################################################### + # + # Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by + # Analog Devices, Inc.), + # Copyright (C) 2023-2024 Analog Devices, Inc. + # + # Licensed under the Apache License, Version 2.0 (the "License"); + # you may not use this file except in compliance with the License. + # You may obtain a copy of the License at + # + # http://www.apache.org/licenses/LICENSE-2.0 + # + # Unless required by applicable law or agreed to in writing, software + # distributed under the License is distributed on an "AS IS" BASIS, + # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + # See the License for the specific language governing permissions and + # limitations under the License. + # + ############################################################################## + +# ** Readme! ** +# Don't edit this file! This is the core Makefile for a MaximSDK +# project. The available configuration options can be overridden +# in "project.mk", on the command-line, or with system environment +# variables. + +# See https://analogdevicesinc.github.io/msdk/USERGUIDE/#build-system +# for more detailed instructions on how to use this system. + +# The detailed instructions mentioned above are easier to read than +# this file, but the comments found in this file also outline the +# available configuration variables. This file is organized into +# sub-sections, some of which expose config variables. + + +# ******************************************************************************* +# Set the target microcontroller and board to compile for. + +# Every TARGET microcontroller has some Board Support Packages (BSPs) that are +# available for it under the MaximSDK/Libraries/Boards/TARGET folder. The BSP +# that gets selected is MaximSDK/Libraries/Boards/TARGET/BOARD. + +# Configuration Variables: +# - TARGET : Override the default target microcontroller. Ex: TARGET=MAX78000 +# - BOARD : Override the default BSP (case sensitive). Ex: BOARD=EvKit_V1, BOARD=FTHR_RevA + + +ifeq "$(TARGET)" "" +# Default target microcontroller +TARGET := MAX32690 +TARGET_UC := MAX32690 +TARGET_LC := max32690 +else +# "TARGET" has been overridden in the environment or on the command-line. +# We need to calculate an upper and lowercase version of the part number, +# because paths on Linux and MacOS are case-sensitive. +TARGET_UC := $(subst m,M,$(subst a,A,$(subst x,X,$(TARGET)))) +TARGET_LC := $(subst M,m,$(subst A,a,$(subst X,x,$(TARGET)))) +endif + +# Default board. +BOARD ?= EvKit_V1 + +# ******************************************************************************* +# Locate the MaximSDK + +# This Makefile needs to know where to find the MaximSDK, and the MAXIM_PATH variable +# should point to the root directory of the MaximSDK installation. Setting this manually +# is usually only required if you're working on the command-line. + +# If MAXIM_PATH is not specified, we assume the project still lives inside of the MaximSDK +# and move up from this project's original location. + +# Configuration Variables: +# - MAXIM_PATH : Tell this Makefile where to find the MaximSDK. Ex: MAXIM_PATH=C:/MaximSDK + + +ifneq "$(MAXIM_PATH)" "" +# Sanitize MAXIM_PATH for backslashes +MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +# Locate some other useful paths... +LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries) +CMSIS_ROOT := $(LIBS_DIR)/CMSIS +endif + +# ******************************************************************************* +# Include project Makefile. We do this after formulating TARGET, BOARD, and MAXIM_PATH +# in case project.mk needs to reference those values. However, we also include +# this as early as possible in the Makefile so that it can append to or override +# the variables below. + + +PROJECTMK ?= $(abspath ./project.mk) +include $(PROJECTMK) +$(info Loaded project.mk) +# PROJECTMK is also used by implicit rules and other libraries to add project.mk as a watch file + +# ******************************************************************************* +# Final path sanitization and re-calculation. No options here. + +ifeq "$(MAXIM_PATH)" "" +# MAXIM_PATH is still not defined... +DEPTH := ../../../ +MAXIM_PATH := $(abspath $(DEPTH)) +$(warning Warning: MAXIM_PATH is not set! Set MAXIM_PATH in your environment or in project.mk to clear this warning.) +$(warning Warning: Attempting to use $(MAXIM_PATH) calculated from relative path) +else +# Sanitize MAXIM_PATH for backslashes +MAXIM_PATH := $(subst \,/,$(MAXIM_PATH)) +endif + +# Final recalculation of LIBS_DIR/CMSIS_ROOT +LIBS_DIR := $(abspath $(MAXIM_PATH)/Libraries) +CMSIS_ROOT := $(LIBS_DIR)/CMSIS + +# One final UC/LC check in case user set TARGET in project.mk +TARGET_UC := $(subst m,M,$(subst a,A,$(subst x,X,$(TARGET)))) +TARGET_LC := $(subst M,m,$(subst A,a,$(subst X,x,$(TARGET)))) + +export TARGET +export TARGET_UC +export TARGET_LC +export CMSIS_ROOT +# TODO: Remove dependency on exports for these variables. + +# ******************************************************************************* +# Set up search paths, and auto-detect all source code on those paths. + +# The following paths are searched by default, where "./" is the project directory. +# ./ +# |- *.h +# |- *.c +# |-include (optional) +# |- *.h +# |-src (optional) +# |- *.c + +# Configuration Variables: +# - VPATH : Tell this Makefile to search additional locations for source (.c) files. +# You should use the "+=" operator with this option. +# Ex: VPATH += your/new/path +# - IPATH : Tell this Makefile to search additional locations for header (.h) files. +# You should use the "+=" operator with this option. +# Ex: VPATH += your/new/path +# - SRCS : Tell this Makefile to explicitly add a source (.c) file to the build. +# This is really only useful if you want to add a source file that isn't +# on any VPATH, in which case you can add the full path to the file here. +# You should use the "+=" operator with this option. +# Ex: SRCS += your/specific/source/file.c +# - AUTOSEARCH : Set whether this Makefile should automatically detect .c files on +# VPATH and add them to the build. This is enabled by default. Set +# to 0 to disable. If autosearch is disabled, source files must be +# manually added to SRCS. +# Ex: AUTOSEARCH = 0 + + +# Where to find source files for this project. +VPATH += . +VPATH += src +VPATH := $(VPATH) + +# Where to find header files for this project +IPATH += . +IPATH += include +IPATH := $(IPATH) + +AUTOSEARCH ?= 1 +ifeq ($(AUTOSEARCH), 1) +# Auto-detect all C/C++ source files on VPATH +SRCS += $(wildcard $(addsuffix /*.c, $(VPATH))) +SRCS += $(wildcard $(addsuffix /*.cpp, $(VPATH))) +endif + +# Collapse SRCS before passing them on to the next stage +SRCS := $(SRCS) + +# ******************************************************************************* +# Set the output filename + +# Configuration Variables: +# - PROJECT : Override the default output filename. Ex: PROJECT=MyProject + + +# The default value creates a file named after the target micro. Ex: MAX78000.elf +PROJECT ?= $(TARGET_LC) + +# ******************************************************************************* +# Compiler options + +# Configuration Variables: +# - DEBUG : Set DEBUG=1 to build explicitly for debugging. This adds some additional +# symbols and sets -Og as the default optimization level. +# - MXC_OPTIMIZE_CFLAGS : Override the default compiler optimization level. +# Ex: MXC_OPTIMIZE_CFLAGS = -O2 +# - PROJ_CFLAGS : Add additional compiler flags to the build. +# You should use the "+=" operator with this option. +# Ex: PROJ_CFLAGS += -Wextra +# - MFLOAT_ABI : Set the floating point acceleration level. +# The only options are "hard", "soft", or "softfp". +# Ex: MFLOAT_ABI = hard +# - LINKERFILE : Override the default linkerfile. +# Ex: LINKERFILE = customlinkerfile.ld +# - LINKERPATH : Override the default search location for $(LINKERFILE) +# The default search location is $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source/GCC +# If $(LINKERFILE) cannot be found at this path, then the root project +# directory will be used as a fallback. + +# Select 'GCC' or 'IAR' compiler +ifeq "$(COMPILER)" "" +COMPILER := GCC +endif + +# Set default compiler optimization levels +ifeq "$(MAKECMDGOALS)" "release" +# Default optimization level for "release" builds (make release) +MXC_OPTIMIZE_CFLAGS ?= -O2 +DEBUG = 0 +endif + +ifeq ($(DEBUG),1) +# Optimizes for debugging as recommended +# by GNU for code-edit-debug cycles +# https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html#Optimize-Options +MXC_OPTIMIZE_CFLAGS := -Og +endif + +# Default level if not building for release or explicitly for debug +MXC_OPTIMIZE_CFLAGS ?= -Og + +# Set compiler flags +PROJ_CFLAGS += -Wall # Enable warnings +PROJ_CFLAGS += -DMXC_ASSERT_ENABLE + +# Set hardware floating point acceleration. +# Options are: +# - hard +# - soft +# - softfp (default if MFLOAT_ABI is not set) +MFLOAT_ABI ?= softfp +# MFLOAT_ABI must be exported to other Makefiles +export MFLOAT_ABI + +# This path contains system-level intialization files for the target micro. Add to the build. +VPATH += $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source + +# ******************************************************************************* +# Secure Boot Tools (SBT) + +# This section integrates the Secure Boot Tools. It's intended for use with +# microcontrollers that have a secure bootloader. + +# Enabling SBT integration will add some special rules, such as "make sla", "make scpa", etc. + +# Configuration variables: +# SBT : Toggle SBT integration. Set to 1 to enable, or 0 +# to disable +# MAXIM_SBT_DIR : Specify the location of the SBT tool binaries. This defaults to +# Tools/SBT in the MaximSDK. The standalone SBT installer will override +# this via an environment variable. +# TARGET_SEC : Specify the part number to be passed into the SBT. This should match +# the secure variant part #. The default value will depend on TARGET. +# For example, TARGET=MAX32650 will result in TARGET_SEC=MAX32651, and +# the default selection happens in Tools/SBT/SBT-config. +# However, if there are multiple secure part #s for the target +# microcontroller this variable may need to be changed. + +SBT ?= 0 +ifeq ($(SBT), 1) +MAXIM_SBT_DIR ?= $(MAXIM_PATH)/Tools/SBT +MAXIM_SBT_DIR := $(subst \,/,$(MAXIM_SBT_DIR)) +# ^ Must sanitize path for \ on Windows, since this may come from an environment +# variable. + +export MAXIM_SBT_DIR # SBTs must have this environment variable defined to work + +# SBT-config.mk and SBT-rules.mk are included further down this Makefile. + +endif # SBT + +# ******************************************************************************* +# Default goal selection. This section allows you to override the default goal +# that will run if no targets are specified on the command-line. +# (ie. just running 'make' instead of 'make all') + +# Configuration variables: +# .DEFAULT_GOAL : Set the default goal if no targets were specified on the +# command-line +# ** "override" must be used with this variable. ** +# Ex: "override .DEFAULT_GOAL = mygoal" + +ifeq "$(.DEFAULT_GOAL)" "" +ifeq ($(SBT),1) +override .DEFAULT_GOAL := sla +else +override .DEFAULT_GOAL := all +endif +endif + +# Developer note: 'override' is used above for legacy Makefile compatibility. +# gcc.mk/gcc_riscv.mk need to hard-set 'all' internally, so this new system +# uses 'override' to come in over the top without breaking old projects. + +# It's also necessary to explicitly set MAKECMDGOALS... +ifeq "$(MAKECMDGOALS)" "" +MAKECMDGOALS:=$(.DEFAULT_GOAL) +endif + +# Enable colors when --sync-output is used. +# See https://www.gnu.org/software/make/manual/make.html#Terminal-Output (section 13.2) +ifneq ($(MAKE_TERMOUT),) +PROJ_CFLAGS += -fdiagnostics-color=always +endif + +ifneq ($(FORCE_COLOR),) +PROJ_CFLAGS += -fdiagnostics-color=always +endif + +# ******************************************************************************* +# Include SBT config. We need to do this here because it needs to know +# the current MAKECMDGOAL. +ifeq ($(SBT),1) +include $(MAXIM_PATH)/Tools/SBT/SBT-config.mk +endif + +# ******************************************************************************* +# Libraries + +# This section offers "toggle switches" to include or exclude the libraries that +# are available in the MaximSDK. Set a configuration variable to 1 to include the +# library in the build, or 0 to exclude. + +# Each library may also have its own library specific configuration variables. See +# Libraries/libs.mk for more details. + +# Configuration variables: +# - LIB_BOARD : Include the Board-Support Package (BSP) library. (Enabled by default) +# - LIB_PERIPHDRIVERS : Include the peripheral driver library. (Enabled by default) +# - LIB_CMSIS_DSP : Include the CMSIS-DSP library. +# - LIB_CORDIO : Include the Cordio BLE library +# - LIB_FCL : Include the Free Cryptographic Library (FCL) +# - LIB_FREERTOS : Include the FreeRTOS and FreeRTOS-Plus-CLI libraries +# - LIB_LC3 : Include the Low Complexity Communication Codec (LC3) library +# - LIB_LITTLEFS : Include the "little file system" (littleFS) library +# - LIB_LWIP : Include the lwIP library +# - LIB_MAXUSB : Include the MAXUSB library +# - LIB_SDHC : Include the SDHC library + +include $(LIBS_DIR)/libs.mk + + +# ******************************************************************************* +# Rules + +# Include the rules for building for this target. All other makefiles should be +# included before this one. +include $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source/$(COMPILER)/$(TARGET_LC).mk + +# Include the rules that integrate the SBTs. SBTs are a special case that must be +# include after the core gcc rules to extend them. +ifeq ($(SBT), 1) +include $(MAXIM_PATH)/Tools/SBT/SBT-rules.mk +endif + + +# Get .DEFAULT_GOAL working. +ifeq "$(MAKECMDGOALS)" "" +MAKECMDGOALS:=$(.DEFAULT_GOAL) +endif + + +all: +# Extend the functionality of the "all" recipe here + arm-none-eabi-size --format=berkeley $(BUILD_DIR)/$(PROJECT).elf + +libclean: + $(MAKE) -f ${PERIPH_DRIVER_DIR}/periphdriver.mk clean.periph + +clean: +# Extend the functionality of the "clean" recipe here + +# The rule to clean out all the build products. +distclean: clean libclean diff --git a/Examples/MAX32690/SPI_v2/README.md b/Examples/MAX32690/SPI_v2/README.md new file mode 100644 index 00000000000..891938ca508 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/README.md @@ -0,0 +1,67 @@ +## Description + +This example configures the SPI to send data between the MISO (P2.27) and MOSI (P2.28) pins. Connect these two pins together. + +Multiple word sizes (2 through 16 bits) are demonstrated. + +By default, the example performs blocking SPI transactions. To switch to non-blocking (asynchronous) transactions, reset the `CONTROLLER_SYNC` macro to 0 and set the `CONTROLLER_ASYNC` macro to 1. To use DMA transactions, set the `CONTROLLER_DMA` macro to 1 instead. + +This example uses the Hardware Target Select control scheme (application does not assert the TS pins). + +## Software + +This project uses the SPI v2 library. More information on the SPI v2 library can be found in the **[MSDK User Guide Developer Notes](https://analogdevicesinc.github.io/msdk/USERGUIDE/#spi-v2-library)**. + +### Project Usage + +Universal instructions on building, flashing, and debugging this project can be found in the **[MSDK User Guide](https://analogdevicesinc.github.io/msdk/USERGUIDE/)**. + +### Project-Specific Build Notes + +Set `MXC_SPI_VERSION=v2` to build the SPI v2 libraries. + +## Required Connections + +If using the MAX32690EVKIT: +- Connect a USB cable between the PC and the CN2 (USB/PWR) connector. +- Install JP7(RX_EN) and JP8(TX_EN) headers. +- Open an terminal application on the PC and connect to the EV kit's console UART at 115200, 8-N-1. +- Close jumper JP5 (LED0_EN). +- Close jumper JP6 (LED1_EN). +- Connect P2.28 (MOSI) to P2.27 (MISO). + +If using the MAX32690FTHR: +- Connect a USB cable between the PC and the J5 (USB/PWR) connector. +- Open a terminal application on the PC and connect to the EV kit's console UART at 115200, 8-N-1. +- Connect P2.28 (MOSI) to P2.27 (MISO). + +## Expected Output + +The Console UART of the device will output these messages: + +``` +**************************** SPI CONTROLLER TEST ************************* +This example configures the SPI to send data between the MISO (P2.27) and +MOSI (P2.28) pins. Connect these two pins together. + +Multiple word sizes (2 through 16 bits) are demonstrated. + +Performing blocking (synchronous) transactions... +--> 2 Bits Transaction Successful +--> 3 Bits Transaction Successful +--> 4 Bits Transaction Successful +--> 5 Bits Transaction Successful +--> 6 Bits Transaction Successful +--> 7 Bits Transaction Successful +--> 8 Bits Transaction Successful +--> 9 Bits Transaction Successful +-->10 Bits Transaction Successful +-->11 Bits Transaction Successful +-->12 Bits Transaction Successful +-->13 Bits Transaction Successful +-->14 Bits Transaction Successful +-->15 Bits Transaction Successful +-->16 Bits Transaction Successful + +Example Complete. +``` diff --git a/Examples/MAX32690/SPI_v2/SPI_v2.launch b/Examples/MAX32690/SPI_v2/SPI_v2.launch new file mode 100644 index 00000000000..84b03b3126e --- /dev/null +++ b/Examples/MAX32690/SPI_v2/SPI_v2.launch @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Examples/MAX32690/SPI_v2/main.c b/Examples/MAX32690/SPI_v2/main.c new file mode 100644 index 00000000000..282032c1bb1 --- /dev/null +++ b/Examples/MAX32690/SPI_v2/main.c @@ -0,0 +1,236 @@ +/****************************************************************************** + * + * Copyright (C) 2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +/** + * @file main.c + * @brief SPI Controller Demo + * @details This example demonstrates the SPI controller loopback transactions. + */ + +/***** Includes *****/ +#include +#include +#include +#include +#include "mxc_device.h" +#include "mxc_delay.h" +#include "mxc_pins.h" +#include "nvic_table.h" +#include "uart.h" +#include "spi.h" +#include "dma.h" +#include "led.h" + +/***** Preprocessors *****/ +#define CONTROLLER_SYNC 1 +#define CONTROLLER_ASYNC 0 +#define CONTROLLER_DMA 0 + +// Preprocessor Error Checking +#if (!(CONTROLLER_SYNC || CONTROLLER_ASYNC || CONTROLLER_DMA)) +#error "You must set either CONTROLLER_SYNC or CONTROLLER_ASYNC or CONTROLLER_DMA to 1." +#endif +#if ((CONTROLLER_SYNC && CONTROLLER_ASYNC) || (CONTROLLER_ASYNC && CONTROLLER_DMA) || \ + (CONTROLLER_DMA && CONTROLLER_SYNC)) +#error "You must select either CONTROLLER_SYNC or CONTROLLER_ASYNC or CONTROLLER_DMA, not all 3." +#endif + +/***** Definitions *****/ +#define DATA_LEN 100 // Words +#define DATA_VALUE 0xA5B7 // This is for Controller mode only... +#define VALUE 0xFFFF +#define SPI_SPEED 100000 // Bit Rate +#define SPI MXC_SPI0 +#define SPI_IRQ SPI0_IRQn + +/***** Globals *****/ +uint16_t rx_data[DATA_LEN]; +uint16_t tx_data[DATA_LEN]; +volatile int SPI_FLAG; +int TX_DMA_CH, RX_DMA_CH; + +/***** Functions *****/ +void SPI0_IRQHandler(void) +{ + MXC_SPI_AsyncHandler(SPI); +} + +void DMA_TX_IRQHandler(void) +{ + MXC_SPI_DMA_TX_Handler(SPI); +} + +void DMA_RX_IRQHandler(void) +{ + MXC_SPI_DMA_RX_Handler(SPI); +} + +void SPI_Callback(void *data, int error) +{ + SPI_FLAG = error; +} + +int main(void) +{ + int i, j, retVal; + uint16_t temp; + mxc_spi_cfg_t cfg; + + printf("\n**************************** SPI CONTROLLER TEST *************************\n"); + printf("This example configures the SPI to send data between the MISO (P2.27) and\n"); + printf("MOSI (P2.28) pins. Connect these two pins together.\n\n"); + printf("Multiple word sizes (2 through 16 bits) are demonstrated.\n\n"); + +#if CONTROLLER_SYNC + printf("Performing blocking (synchronous) transactions...\n"); +#endif +#if CONTROLLER_ASYNC + printf("Performing non-blocking (asynchronous) transactions...\n"); +#endif +#if CONTROLLER_DMA + printf("Performing transactions with DMA...\n"); +#endif + + for (i = 2; i < 17; i++) { + // Sending out 2 to 16 bits + for (j = 0; j < DATA_LEN; j++) { + tx_data[j] = DATA_VALUE; + } + + mxc_spi_pins_t spi_pins; + // This example enables the TS0 HW pin. + spi_pins.ss0 = true; // TS0 + spi_pins.ss1 = false; // TS1 + spi_pins.ss2 = false; // TS2 + spi_pins.vddioh = true; + spi_pins.drvstr = MXC_GPIO_DRVSTR_0; + + retVal = MXC_SPI_Init(SPI, MXC_SPI_TYPE_CONTROLLER, MXC_SPI_INTERFACE_STANDARD, 0, 0b000, + SPI_SPEED, spi_pins); + if (retVal != E_NO_ERROR) { + printf("\nSPI INITIALIZATION ERROR\n"); + return retVal; + } + + // SPI Settings. + cfg.spi = SPI; + cfg.clk_mode = MXC_SPI_CLKMODE_0; // CPOL: 0, CPHA: 0 + cfg.frame_size = i; + + // DMA Settings. +#if CONTROLLER_DMA + cfg.use_dma_tx = true; + cfg.use_dma_rx = true; + cfg.dma = MXC_DMA; +#else + cfg.use_dma_rx = false; + cfg.use_dma_tx = false; + cfg.dma = MXC_DMA; +#endif + + retVal = MXC_SPI_Config(&cfg); + if (retVal != E_NO_ERROR) { + printf("\nSPI CONFIGURATION ERROR\n"); + return retVal; + } + + memset(rx_data, 0x0, DATA_LEN * sizeof(uint16_t)); + + // SPI Request (Callback) + mxc_spi_req_t req; + req.spi = SPI; + req.txData = (uint8_t *)tx_data; + req.txLen = DATA_LEN; + req.rxData = (uint8_t *)rx_data; + req.rxLen = DATA_LEN; + req.ssDeassert = 1; + req.completeCB = SPI_Callback; + SPI_FLAG = 1; + +#if CONTROLLER_SYNC + MXC_SPI_ControllerTransaction(&req); +#endif + +#if CONTROLLER_ASYNC + NVIC_EnableIRQ(SPI_IRQ); + MXC_SPI_ControllerTransactionAsync(&req); + + while (SPI_FLAG == 1) {} +#endif + +#if CONTROLLER_DMA + TX_DMA_CH = MXC_SPI_DMA_GetTXChannel(SPI); + RX_DMA_CH = MXC_SPI_DMA_GetRXChannel(SPI); + + NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(TX_DMA_CH)); + NVIC_EnableIRQ(MXC_DMA_CH_GET_IRQ(RX_DMA_CH)); + + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(TX_DMA_CH), DMA_TX_IRQHandler); + MXC_NVIC_SetVector(MXC_DMA_CH_GET_IRQ(RX_DMA_CH), DMA_RX_IRQHandler); + + MXC_SPI_ControllerTransactionDMA(&req); + + while (SPI_FLAG == 1) {} +#endif + + uint8_t bits = MXC_SPI_GetFrameSize(SPI); + + // Reformat tx_data to match rx_data frame size. + for (j = 0; j < DATA_LEN; j++) { + if (bits <= 8) { + if (j < (DATA_LEN / 2)) { + temp = VALUE >> (16 - bits); + temp = (temp << 8) | temp; + temp &= DATA_VALUE; + tx_data[j] = temp; + } else if (j == (DATA_LEN / 2) && DATA_LEN % 2 == 1) { + temp = VALUE >> (16 - bits); + temp &= DATA_VALUE; + tx_data[j] = temp; + } else { + tx_data[j] = 0x0000; + } + } else { + temp = VALUE >> (16 - bits); + temp &= DATA_VALUE; + tx_data[j] = temp; + } + } + + // Compare Sent data vs Received data + // Printf needs the Uart turned on since they share the same pins + if (memcmp(rx_data, tx_data, sizeof(tx_data)) != 0) { + printf("\n-->%2d Bits Transaction Failed\n", i); + LED_On(0); + return E_COMM_ERR; + } else { + printf("-->%2d Bits Transaction Successful\n", i); + } + + retVal = MXC_SPI_Shutdown(SPI); + + if (retVal != E_NO_ERROR) { + printf("\n-->SPI SHUTDOWN ERROR: %d\n", retVal); + return retVal; + } + } + + printf("\nExample Complete.\n"); + LED_On(1); // GREEN_LED + return E_NO_ERROR; +} diff --git a/Examples/MAX32690/SPI_v2/project.mk b/Examples/MAX32690/SPI_v2/project.mk new file mode 100644 index 00000000000..a607748507b --- /dev/null +++ b/Examples/MAX32690/SPI_v2/project.mk @@ -0,0 +1,13 @@ +# This file can be used to set build configuration +# variables. These variables are defined in a file called +# "Makefile" that is located next to this one. + +# For instructions on how to use this system, see +# https://analogdevicesinc.github.io/msdk/USERGUIDE/#build-system + +# ********************************************************** + +# Add your config here! + +# Build SPI v2 library for example. +MXC_SPI_VERSION = v2 diff --git a/Libraries/Boards/MAX32690/EvKit_V1/examples.txt b/Libraries/Boards/MAX32690/EvKit_V1/examples.txt index 811ce8d93c2..9db67d9e45f 100644 --- a/Libraries/Boards/MAX32690/EvKit_V1/examples.txt +++ b/Libraries/Boards/MAX32690/EvKit_V1/examples.txt @@ -57,6 +57,7 @@ RTC_Backup RV_ARM_Loader SCPA_OTP_Dump SPI +SPI_v2 Temp_Monitor TFT_Demo TMR diff --git a/Libraries/CMSIS/Device/Maxim/GCC/mxc_version.mk b/Libraries/CMSIS/Device/Maxim/GCC/mxc_version.mk index 84f331f8472..b61ba29bf55 100644 --- a/Libraries/CMSIS/Device/Maxim/GCC/mxc_version.mk +++ b/Libraries/CMSIS/Device/Maxim/GCC/mxc_version.mk @@ -16,7 +16,7 @@ # ############################################################################## # Autogenerated version info for build system. -MSDK_VERSION_STRING := v2024_02-25-g3a91bd6c4a +MSDK_VERSION_STRING := v2024_02-33-g2895589c63 MSDK_VERSION_YEAR := 2024 MSDK_VERSION_MONTH := 2 diff --git a/Libraries/FCL/fcl.mk b/Libraries/FCL/fcl.mk index f0ae068b31b..70488d43847 100644 --- a/Libraries/FCL/fcl.mk +++ b/Libraries/FCL/fcl.mk @@ -70,53 +70,4 @@ ${FCL_BUILD_DIR}/${FCL_LIB}: ${FCL_C_FILES} ${FCL_H_FILES} $(MAKE) -f ${FCL_DIR}/libfcl.mk lib BUILD_DIR=${FCL_BUILD_DIR} clean.fcl: -############################################################################### - # - # Copyright 2023 Analog Devices, Inc. - # - # Licensed under the Apache License, Version 2.0 (the "License"); - # you may not use this file except in compliance with the License. - # You may obtain a copy of the License at - # - # http://www.apache.org/licenses/LICENSE-2.0 - # - # Unless required by applicable law or agreed to in writing, software - # distributed under the License is distributed on an "AS IS" BASIS, - # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - # See the License for the specific language governing permissions and - # limitations under the License. - # - ############################################################################## - # - # Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved. - # - # Permission is hereby granted, free of charge, to any person obtaining a - # copy of this software and associated documentation files (the "Software"), - # to deal in the Software without restriction, including without limitation - # the rights to use, copy, modify, merge, publish, distribute, sublicense, - # and/or sell copies of the Software, and to permit persons to whom the - # Software is furnished to do so, subject to the following conditions: - # - # The above copyright notice and this permission notice shall be included - # in all copies or substantial portions of the Software. - # - # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - # IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES - # OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - # OTHER DEALINGS IN THE SOFTWARE. - # - # Except as contained in this notice, the name of Maxim Integrated - # Products, Inc. shall not be used except as stated in the Maxim Integrated - # Products, Inc. Branding Policy. - # - # The mere transfer of this software does not imply any licenses - # of trade secrets, proprietary technology, copyrights, patents, - # trademarks, maskwork rights, or any other form of intellectual - # property whatsoever. Maxim Integrated Products, Inc. retains all - # ownership rights. - # - ############################################################################## @rm -rf ${FCL_BUILD_DIR}/* \ No newline at end of file diff --git a/Libraries/FCL/fcl_files.mk b/Libraries/FCL/fcl_files.mk index 56807e3f262..e10ad84241a 100644 --- a/Libraries/FCL/fcl_files.mk +++ b/Libraries/FCL/fcl_files.mk @@ -51,53 +51,4 @@ FCL_INCLUDE_DIR += $(PERIPH_DRIVER)/Include/$(TARGET_UC) FCL_C_FILES += $(sort $(wildcard $(FCL_DIR)/src/*.c)) # Where to find header files for this project -############################################################################### - # - # Copyright 2023 Analog Devices, Inc. - # - # Licensed under the Apache License, Version 2.0 (the "License"); - # you may not use this file except in compliance with the License. - # You may obtain a copy of the License at - # - # http://www.apache.org/licenses/LICENSE-2.0 - # - # Unless required by applicable law or agreed to in writing, software - # distributed under the License is distributed on an "AS IS" BASIS, - # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - # See the License for the specific language governing permissions and - # limitations under the License. - # - ############################################################################## - # - # Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved. - # - # Permission is hereby granted, free of charge, to any person obtaining a - # copy of this software and associated documentation files (the "Software"), - # to deal in the Software without restriction, including without limitation - # the rights to use, copy, modify, merge, publish, distribute, sublicense, - # and/or sell copies of the Software, and to permit persons to whom the - # Software is furnished to do so, subject to the following conditions: - # - # The above copyright notice and this permission notice shall be included - # in all copies or substantial portions of the Software. - # - # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - # IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES - # OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - # OTHER DEALINGS IN THE SOFTWARE. - # - # Except as contained in this notice, the name of Maxim Integrated - # Products, Inc. shall not be used except as stated in the Maxim Integrated - # Products, Inc. Branding Policy. - # - # The mere transfer of this software does not imply any licenses - # of trade secrets, proprietary technology, copyrights, patents, - # trademarks, maskwork rights, or any other form of intellectual - # property whatsoever. Maxim Integrated Products, Inc. retains all - # ownership rights. - # - ############################################################################## FCL_H_FILES += $(wildcard $(addsuffix /*.h,$(FCL_INCLUDE_DIR))) diff --git a/Libraries/FCL/libfcl.mk b/Libraries/FCL/libfcl.mk index 744c261ecd1..ef7476e5d44 100644 --- a/Libraries/FCL/libfcl.mk +++ b/Libraries/FCL/libfcl.mk @@ -78,53 +78,4 @@ endif MAKECMDGOALS=lib # Include the rules for building for this target -############################################################################### - # - # Copyright 2023 Analog Devices, Inc. - # - # Licensed under the Apache License, Version 2.0 (the "License"); - # you may not use this file except in compliance with the License. - # You may obtain a copy of the License at - # - # http://www.apache.org/licenses/LICENSE-2.0 - # - # Unless required by applicable law or agreed to in writing, software - # distributed under the License is distributed on an "AS IS" BASIS, - # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - # See the License for the specific language governing permissions and - # limitations under the License. - # - ############################################################################## - # - # Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved. - # - # Permission is hereby granted, free of charge, to any person obtaining a - # copy of this software and associated documentation files (the "Software"), - # to deal in the Software without restriction, including without limitation - # the rights to use, copy, modify, merge, publish, distribute, sublicense, - # and/or sell copies of the Software, and to permit persons to whom the - # Software is furnished to do so, subject to the following conditions: - # - # The above copyright notice and this permission notice shall be included - # in all copies or substantial portions of the Software. - # - # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - # OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - # IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES - # OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - # ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - # OTHER DEALINGS IN THE SOFTWARE. - # - # Except as contained in this notice, the name of Maxim Integrated - # Products, Inc. shall not be used except as stated in the Maxim Integrated - # Products, Inc. Branding Policy. - # - # The mere transfer of this software does not imply any licenses - # of trade secrets, proprietary technology, copyrights, patents, - # trademarks, maskwork rights, or any other form of intellectual - # property whatsoever. Maxim Integrated Products, Inc. retains all - # ownership rights. - # - ############################################################################## include $(CMSIS_ROOT)/Device/Maxim/$(TARGET_UC)/Source/$(COMPILER)/$(TARGET_LC).mk diff --git a/Libraries/PeriphDrivers/Include/MAX32690/mxc_pins.h b/Libraries/PeriphDrivers/Include/MAX32690/mxc_pins.h index 569453bd506..9228a80fa9f 100644 --- a/Libraries/PeriphDrivers/Include/MAX32690/mxc_pins.h +++ b/Libraries/PeriphDrivers/Include/MAX32690/mxc_pins.h @@ -154,7 +154,7 @@ extern const mxc_gpio_cfg_t gpio_cfg_spi0_dual; extern const mxc_gpio_cfg_t gpio_cfg_spi0_quad; extern const mxc_gpio_cfg_t gpio_cfg_spi1_standard; extern const mxc_gpio_cfg_t gpio_cfg_spi1_3wire; -extern const mxc_gpio_cfg_t gpio_cfg_spi1_dua; +extern const mxc_gpio_cfg_t gpio_cfg_spi1_dual; extern const mxc_gpio_cfg_t gpio_cfg_spi1_quad_0; extern const mxc_gpio_cfg_t gpio_cfg_spi1_quad_1; extern const mxc_gpio_cfg_t gpio_cfg_spi2_standard; diff --git a/Libraries/PeriphDrivers/Include/MAX32690/spi.h b/Libraries/PeriphDrivers/Include/MAX32690/spi.h index a64595dc79a..1063362a87b 100644 --- a/Libraries/PeriphDrivers/Include/MAX32690/spi.h +++ b/Libraries/PeriphDrivers/Include/MAX32690/spi.h @@ -28,12 +28,13 @@ /***** includes *******/ #include -#include "spi_regs.h" #include "mxc_sys.h" #include "mxc_assert.h" -#include "gpio.h" #include "mxc_pins.h" #include "mxc_lock.h" +#include "gpio.h" +#include "spi_regs.h" +#include "dma_regs.h" #ifdef __cplusplus extern "C" { @@ -47,31 +48,74 @@ extern "C" { /***** Definitions *****/ +// clang-format off + +/** + * @brief The list of types for the SPI peripheral. + */ +typedef enum { + MXC_SPI_TYPE_SLAVE = 0, + MXC_SPI_TYPE_TARGET = 0, + MXC_SPI_TYPE_MASTER = 1, + MXC_SPI_TYPE_CONTROLLER = 1 +} mxc_spi_type_t; + +/** + * @brief The list of Target Select Control Scheme Options for + * target assertion/deassertion. + */ +typedef enum { + MXC_SPI_TSCONTROL_HW_AUTO = 0, ///< Automatically by hardware + MXC_SPI_TSCONTROL_SW_APP = 1 ///< Through software in the application +} mxc_spi_tscontrol_t; + +/** + * @brief The list of possible states for an SPI instance. + */ +typedef enum { + MXC_SPI_STATE_READY = 0, ///< Ready for transaction + MXC_SPI_STATE_BUSY = 1 ///< Busy transferring +} mxc_spi_state_t; + +/** + * @brief The list of supported SPI Interface Modes. + */ +typedef enum { + MXC_SPI_INTERFACE_STANDARD = 0, + MXC_SPI_INTERFACE_4WIRE = 0, + MXC_SPI_INTERFACE_QUAD = 1, + MXC_SPI_INTERFACE_3WIRE = 2, + MXC_SPI_INTERFACE_DUAL = 3 +} mxc_spi_interface_t; + +/** + * @brief The list of SPI clock modes + * + * SPI supports four combinations of clock and phase polarity. + * + * Clock polarity is controlled using the bit SPIn_CTRL2.cpol + * and determines if the clock is active high or active low + * + * Clock phase determines when the data must be stable for sampling + */ +typedef enum { + MXC_SPI_CLKMODE_0 = 0, ///< CPOL: 0 CPHA: 0 + MXC_SPI_CLKMODE_1 = 1, ///< CPOL: 0 CPHA: 1 + MXC_SPI_CLKMODE_2 = 2, ///< CPOL: 1 CPHA: 0 + MXC_SPI_CLKMODE_3 = 3 ///< CPOL: 1 CPHA: 1 +} mxc_spi_clkmode_t; + +///>>> @deprecated /** * @brief The list of SPI Widths supported - * - * The SPI Width can be set on a per-transaction basis. - * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is - * given. - * - * Using a MAX31865 RTD-to-SPI IC, read back the temperature - * The IC requires a SPI Read to be executed as - * 1. Assert SS - * 2. Write an 8bit register address - * 3. Read back the 8 bit register - * 4. Deassert SS - * This can be accomplished with the STANDARD_HALFDUPLEX width - * 1. set txData to the address, txLen=1 - * 2. set rxData to a buffer of 1 byte, rxLen=1 - * 3. The driver will transmit the txData, and after completion of - * txData begin to recieve data, padding MOSI with DefaultTXData - * + * + * @deprecated. */ typedef enum { - SPI_WIDTH_3WIRE = 0, ///< 1 Data line, half duplex + SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex - SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex - SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex + SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex + SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex } mxc_spi_width_t; /** @@ -86,61 +130,68 @@ typedef enum { * */ typedef enum { - SPI_MODE_0 = 0, ///< clock phase = 0, clock polarity = 0 + SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 } mxc_spi_mode_t; - -typedef struct _mxc_spi_pins_t mxc_spi_pins_t; - -/** - * @brief Structure used to initialize SPI pins. - * - * @note All values must be initialized. - * - * @note True equals pin is set for the spi function false the pin is left to its latest state. - */ -struct _mxc_spi_pins_t { - bool ss0; ///< Slave select pin 0 - bool ss1; ///< Slave select pin 1 - bool ss2; ///< Slave select pin 2 -}; +///<<< Deprecated typedef struct _mxc_spi_req_t mxc_spi_req_t; + /** * @brief The callback routine used to indicate the transaction has terminated. * * @param req The details of the transaction. * @param result See \ref MXC_Error_Codes for the list of error codes. */ -typedef void (*spi_complete_cb_t)(void *req, int result); +typedef void (*mxc_spi_callback_t)(void *, int result); +typedef mxc_spi_callback_t spi_complete_cb_t; // Support SPI v1 name. -/** - * @brief The information required to perform a complete SPI transaction - * - * This structure is used by blocking, async, and DMA based transactions. - * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. - */ +typedef struct _mxc_spi_pins_t mxc_spi_pins_t; +struct _mxc_spi_pins_t { + bool ss0; ///< Target select pin 0. + bool ss1; ///< Target select pin 1. + bool ss2; ///< Target select pin 2. + + bool vddioh; ///< VDDIOH Select + + bool clock; ///< Clock pin + bool miso; ///< miso pin + bool mosi; ///< mosi pin + bool sdio2; ///< SDIO2 pin + bool sdio3; ///< SDIO3 pin + + mxc_gpio_drvstr_t drvstr; ///< Drive strength setting +}; + +typedef struct { + // SPI Settings. + mxc_spi_regs_t *spi; ///< Selected SPI Instance + mxc_spi_clkmode_t clk_mode; ///< Clock modes + uint8_t frame_size; ///< Number of bits per character sent + + // DMA Settings. + bool use_dma_tx; ///< Enable DMA TX. + bool use_dma_rx; ///< Enable DMA RX. (use_dma_tx must be true to use DMA RX). + mxc_dma_regs_t *dma; ///< Select DMA instance for SPI DMA. +} mxc_spi_cfg_t; + +// Suppport names for backwards compatibility. struct _mxc_spi_req_t { - mxc_spi_regs_t *spi; /// 8 bits, use two bytes per character - ///< and pad the MSB of the upper byte with zeros - uint8_t *rxData; ///< Buffer to store received data For character sizes - ///< < 8 bits, pad the MSB of each byte with zeros. For - ///< character sizes > 8 bits, use two bytes per character - ///< and pad the MSB of the upper byte with zeros - uint32_t txLen; ///< Number of bytes to be sent from txData - uint32_t rxLen; ///< Number of bytes to be stored in rxData - uint32_t txCnt; ///< Number of bytes actually transmitted from txData - uint32_t rxCnt; ///< Number of bytes stored in rxData - - spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete + mxc_spi_regs_t *spi; ///< Pointer to SPI registers + int ssIdx; ///< Target Select (TS) Index for this request + int ssDeassert; ///< Deassert Target Select (TS) line at end of transaction. + uint8_t *txData; + uint8_t *rxData; + uint32_t txLen; ///< Number of frames to be stored in txData + uint32_t rxLen; ///< Number of frames to be stored in rxData + uint32_t txCnt; ///< Number of bytes transmitted from txData (Unused for SPI v2) + uint32_t rxCnt; ///< Number of bytes stored in rxData (Unused for SPI v2) + mxc_spi_callback_t completeCB; ///< Callback at the end of transaction + uint16_t txDummyValue; ///< Value of dummy bytes to be sent }; +// clang-format on /* ************************************************************************* */ /* Control/Configuration functions */ @@ -148,273 +199,360 @@ struct _mxc_spi_req_t { /** * @brief Initialize and enable SPI peripheral. - * - * This function initializes everything necessary to call a SPI transaction function. - * Some parameters are set to defaults as follows: - * SPI Mode - 0 - * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) - * - * These parameters can be modified after initialization using low level functions * - * @note On default this function enables SPI peripheral clock and spi gpio pins. - * if you wish to manage clock and gpio related things in upper level instead of here. - * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. - * By this flag this function will remove clock and gpio related codes from file - * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param masterMode Whether to put the device in master or slave mode. Use - * non-zero for master mode, and zero for slave mode. - * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use - * non-zero if the pins are needed (if Quad Mode will - * be used), and zero if they are not needed (quad mode - * will never be used). - * @param numSlaves The number of slaves used, if in master mode. This - * is used to obtain control of the necessary SS pins. - * In slave mode this is ignored and SS1 is used. - * @param ssPolarity This field sets the SS active polarity for each - * slave, each bit position corresponds to each SS line. - * @param hz The requested clock frequency. The actual clock frequency - * will be returned by the function if successful. Used in - * master mode only. - * @param pins SPI pin structure. Pins selected as true will be initialized - * for the requested SPI block. Has no effect incase of - * MSDK_NO_GPIO_CLK_INIT has been defined. + * This function does not set the Clock Mode (defaults to Clock Mode 0) and + * only two interface modes are selectable (Quad Mode or 4-Wire Standard Mode). + * To change the clock mode, call MXC_SPI_SetClkMode(..).. + * To select another interface mode, call MXC_SPI_SetInterface(..).. + * + * These parameters can be modified after cfgialization using low level functions + * + * @param spi Pointer to SPI instance's registers. + * @param controller_target Whether to put the device in controller or target mode. Use + * non-zero for controller mode, and zero for target mode. + * MXC_SPI_TYPE_CONTROLLER - 1 + * MXC_SPI_TYPE_TARGET - 0 + * @param if_mode Set the interface mode. + * MXC_SPI_INTERFACE_STANDARD - 0 (4 wire) + * MXC_SPI_INTERFACE_QUAD - 1 + * MXC_SPI_INTERFACE_3WIRE - 2 + * MXC_SPI_INTERFACE_DUAL - 3 + * @param numTargets This parameter is UNUSED for SPI v2. + * The number of target used, if in controller mode. This + * is used to obtain control of the necessary TS pins. + * In target mode this is ignored and TS1 is used. + * @param ts_active_pol_mask This field sets the TS active polarity for each + * target, each bit position corresponds to each TS line. + * ts_active_pol_mask[0] - TS0 + * ts_active_pol_mask[1] - TS1 + * ts_active_pol_mask[n] - TSn + * @param freq The requested clock frequency. The actual clock frequency + * will be returned by the function if successful. Used in + * master mode only. + * @param pins SPI pin structure. Pins selected as true will be initialized + * for the requested SPI block. * * @return If successful, the actual clock frequency is returned. Otherwise, see * \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, - unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins); +int MXC_SPI_Init(mxc_spi_regs_t *spi, mxc_spi_type_t controller_target, mxc_spi_interface_t if_mode, + int numTargets, uint8_t ts_active_pol_mask, uint32_t freq, mxc_spi_pins_t pins); /** - * @brief Disable and shutdown SPI peripheral. + * @brief Configure the SPI peripheral. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * List of Setting that will be updated: + * Clock Mode. + * Frame Size (bits). + * Interface Mode (Dual, Quad, Standard, 3-Wire). + * If DMA selections are true, configure and acquire DMA channels. + * + * @param cfg Pointer to SPI configuration struct. * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); +int MXC_SPI_Config(mxc_spi_cfg_t *cfg); /** - * @brief Checks if the given SPI bus can be placed in sleep mode. + * @brief Overwrite the cfg struct with default values. * - * This functions checks to see if there are any on-going SPI transactions in - * progress. If there are transactions in progress, the application should - * wait until the SPI bus is free before entering a low-power state. + * Settings: + * SPI APB (SPI1) instance + * Default, predefined SPI pins at VDDIO + * Controller Mode + * Standard 4-wire mode + * 100KHz speed + * CPOL: 0, CPHA: 0 + * Automatic Hardware mode for TS Control + * TS0 pin + * Target active polarity is LOW (0) + * If use_dma = true, set DMATX and RX to true and set the DMA0 as the default instance. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param cfg Pointer to SPI configuration struct. + * @param use_dma_tx True/False option to configure DMA TX. + * @param use_dma_rx True/False option to configure DMA RX. * - * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref - * MXC_Error_Codes for the list of error return codes. + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes.odes. */ -int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); +int MXC_SPI_ConfigStruct(mxc_spi_cfg_t *cfg, bool use_dma_tx, bool use_dma_rx); /** - * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. + * @brief Disable and shutdown the SPI instance. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * - * @return Frequency of the clock used as the bit rate generator + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); +int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); /** - * @brief Set the frequency of the SPI interface. + * @brief Gets the interrupt flags that are currently set * - * This function is applicable in Master mode only + * These functions should not be used while using non-blocking Transaction Level + * functions (Async or DMA) * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param hz The desired frequency in Hertz. + * @param spi Pointer to SPI registers (selects the SPI block used). * - * @return Negative if error, otherwise actual speed set. See \ref - * MXC_Error_Codes for the list of error return codes. + * @return The interrupt flags. */ -int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); +unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); /** - * @brief Get the frequency of the SPI interface. + * @brief Clears the interrupt flags that are currently set. * - * This function is applicable in Master mode only + * These functions should not be used while using non-blocking Transaction Level + * functions (Async or DMA). + * + * @param spi Pointer to SPI registers (selects the SPI block used). + */ +void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); + +/** + * @brief Enables specific interrupts * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * These functions should not be used while using non-blocking Transaction Level + * functions (Async or DMA). * - * @return The SPI bus frequency in Hertz + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param intEn The interrupts to be enabled. */ -unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); +void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); /** - * @brief Sets the number of bits per character + * @brief Disables specific interrupts * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param dataSize The number of bits per character + * These functions should not be used while using non-blocking Transaction Level + * functions (Async or DMA) * - * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param intDis The interrupts to be disabled */ -int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); +void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); /** - * @brief Gets the number of bits per character + * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * - * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + * @return Frequency of the clock used as the bit rate generator */ -int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); +int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); -/* ************************************************************************* */ -/* Low-level functions */ -/* ************************************************************************* */ +/** + * @brief Configures the Pre-defined SPI Target Select pins for a specific instance. + * + * @param spi Pointer to SPI instance's registers. + * @param ts_control Target Select Control Scheme (\ref mxc_spi_tscontrol_t). + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_SetTSControl(mxc_spi_regs_t *spi, mxc_spi_tscontrol_t ts_control); /** - * @brief Sets the slave select (SS) line used for transmissions + * @brief Set the frequency of the SPI interface. * * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param ssIdx Slave select index + * @param spi Pointer to SPI instance's registers. + * @param hz The desired frequency in Hertz. * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); +int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); /** - * @brief Gets the slave select (SS) line used for transmissions + * @brief Get the frequency of the SPI interface. * * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * - * @return slave slect + * @return If successful, the SPI instance's set frequency value is returned. + * Otherwise, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); +unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); /** - * @brief Sets the SPI width used for transmissions + * @brief Sets the number of bits per frame. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) + * @param spi Pointer to SPI instance's registers. + * @param frame_size The number of bits per frame. * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); +int MXC_SPI_SetFrameSize(mxc_spi_regs_t *spi, int frame_size); /** - * @brief Gets the SPI width used for transmissions + * @brief Gets the number of bits per frame. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * - * @return Spi Width + * @return If successful, the SPI instance's set data size is returned. + * Otherwise, see \ref MXC_Error_Codes for a list of return codes. */ -mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); +int MXC_SPI_GetFrameSize(mxc_spi_regs_t *spi); /** - * @brief Sets the spi mode using clock polarity and clock phase + * @brief Sets the SPI interface mode used for transmissions. + * + * 3-Wire, Standard (4-Wire), Quad, Dual Modes + * + * @param spi Pointer to SPI instance's registers. + * @param if_mode SPI interface mode (3-Wire, Standard, Dual SPI, Quad SPI). + * See \ref mxc_spi_datawidth_t + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_SetInterface(mxc_spi_regs_t *spi, mxc_spi_interface_t if_mode); + +/** + * @brief Gets the SPI interface mode used for transmissions. + * + * 3-Wire, Standard (4-Wire), Quad, Dual Modes + * + * @param spi Pointer to SPI instance's registers. + * + * @return The selected SPI instance's data line width. See \ref mxc_spi_datawidth_t. + */ +mxc_spi_interface_t MXC_SPI_GetInterface(mxc_spi_regs_t *spi); + +/** + * @brief Sets the SPI clock mode (clock polarity and clock phase). * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param spiMode \ref mxc_spi_mode_t + * @param spi Pointer to SPI instance's registers. + * @param clk_mode SPI clock mode. See \ref mxc_spi_clkmode_t. * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); +int MXC_SPI_SetClkMode(mxc_spi_regs_t *spi, mxc_spi_clkmode_t clk_mode); /** - * @brief Gets the spi mode + * @brief Gets the SPI clock mode (clock polarity and clock phase). * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. + * @param clk_mode SPI clock mode. See \ref mxc_spi_clkmode_t + * + * @return The selected SPI instance's clock mode. See \ref mxc_spi_clkwidth_t. + */ +mxc_spi_clkmode_t MXC_SPI_GetClkMode(mxc_spi_regs_t *spi); + +/** + * @brief Sets the SPI instance's callback function. * - * @return mxc_spi_mode_t \ref mxc_spi_mode_t + * @param spi Pointer to SPI instance's registers. + * @param callback Pointer to callback function called when transaction is complete. + * @param data Pointer for data to pass through callback funciton. + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); +int MXC_SPI_SetCallback(mxc_spi_regs_t *spi, mxc_spi_callback_t callback, void *data); /** - * @brief Starts a SPI Transmission + * @brief Checks the SPI instance for an ongoing transmission * - * This function is applicable in Master mode only + * This function is applicable in Controller mode only. * - * The user must ensure that there are no ongoing transmissions before - * calling this function + * @param spi Pointer to SPI instance's registers. + * + * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_GetActive(mxc_spi_regs_t *spi); + +/** + * @brief Checks whether the SPI instance is ready for sleep. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * - * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + * @return Busy/Ready, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); +int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); /** - * @brief Checks the SPI Peripheral for an ongoing transmission + * @brief Starts a SPI Transmission * * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * The user must ensure that there are no ongoing transmissions before + * calling this function * - * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. + * @param spi Pointer to SPI instance's registers. + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_GetActive(mxc_spi_regs_t *spi); +int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); /** * @brief Aborts an ongoing SPI Transmission * * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); /** - * @brief Unloads bytes from the receive FIFO. + * @brief Abort any asynchronous requests in progress. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param bytes The buffer to read the data into. - * @param len The number of bytes to read. + * Abort any asynchronous requests in progress. Any callbacks associated with + * the active transaction will be executed to indicate when the transaction + * has been terminated. * - * @return The number of bytes actually read. + * @param spi Pointer to SPI instance's registers. */ -unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); +void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); /** - * @brief Get the number of bytes currently available in the receive FIFO. + * @brief Get the amount of free space available in the transmit FIFO. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * * @return The number of bytes available. */ -unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); +unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); /** - * @brief Loads bytes into the transmit FIFO. + * @brief Get the number of bytes currently available in the receive FIFO. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param bytes The buffer containing the bytes to write - * @param len The number of bytes to write. + * @param spi Pointer to SPI instance's registers. * - * @return The number of bytes actually written. + * @return The number of bytes available. */ -unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); +unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); /** - * @brief Get the amount of free space available in the transmit FIFO. - * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @brief Removes and discards all bytes currently in the transmit FIFO. * - * @return The number of bytes available. + * @param spi Pointer to SPI instance's registers. */ -unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); +void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); /** * @brief Removes and discards all bytes currently in the receive FIFO. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. */ void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); /** - * @brief Removes and discards all bytes currently in the transmit FIFO. + * @brief Set the transmit threshold level. + * + * TX FIFO threshold. Smaller values will cause interrupts + * to occur more often, but reduce the possibility of terminating + * a transaction early in master mode, or transmitting invalid data + * in slave mode. Larger values will reduce the time required by + * the ISR, but increase the possibility errors occurring. Passing + * an invalid value will cause the driver to use the value already + * set in the appropriate register. + * + * @param spi Pointer to SPI instance's registers. + * @param numBytes The threshold level to set. This value must be + * between 0 and 8 inclusive. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); +int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); /** * @brief Set the receive threshold level. @@ -427,7 +565,7 @@ void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); * cause the driver to use the value already set in the * appropriate register. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * @param numBytes The threshold level to set. This value must be * between 0 and 8 inclusive. * @@ -435,91 +573,212 @@ void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); */ int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); +/** + * @brief Get the current transmit threshold level. + * + * @param spi Pointer to SPI instance's registers. + * + * @return The transmit threshold value (in bytes). + */ +unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); + /** * @brief Get the current receive threshold level. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * * @return The receive threshold value (in bytes). */ unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); +//////>>> Previous Implementation (SPI v1) /** - * @brief Set the transmit threshold level. + * @brief Sets the number of bits per character * - * TX FIFO threshold. Smaller values will cause interrupts - * to occur more often, but reduce the possibility of terminating - * a transaction early in master mode, or transmitting invalid data - * in slave mode. Larger values will reduce the time required by - * the ISR, but increase the possibility errors occurring. Passing - * an invalid value will cause the driver to use the value already - * set in the appropriate register. + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param dataSize The number of bits per character * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param numBytes The threshold level to set. This value must be - * between 0 and 8 inclusive. + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); + +/** + * @brief Gets the number of bits per character + * + * @param spi Pointer to SPI registers (selects the SPI block used). * * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); +int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); /** - * @brief Get the current transmit threshold level. + * @brief Sets the SPI width used for transmissions * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) * - * @return The transmit threshold value (in bytes). + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); +int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); /** - * @brief Gets the interrupt flags that are currently set + * @brief Gets the SPI width used for transmissions * - * These functions should not be used while using non-blocking Transaction Level - * functions (Async or DMA) + * @param spi Pointer to SPI registers (selects the SPI block used). + * + * @return Spi Width + */ +mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); + +/** + * @brief Sets the slave select (SS) line used for transmissions + * + * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. + * @param ssIdx Slave select index * - * @return The interrupt flags + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. */ -unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); +int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); /** - * @brief Clears the interrupt flags that are currently set + * @brief Gets the slave select (SS) line used for transmissions * - * These functions should not be used while using non-blocking Transaction Level - * functions (Async or DMA) + * This function is applicable in Master mode only * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. * + * @return slave slect */ -void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); +int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); /** - * @brief Enables specific interrupts + * @brief Sets the spi mode using clock polarity and clock phase + * + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param spiMode \ref mxc_spi_mode_t + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); + +/** + * @brief Gets the spi mode + * + * @param spi Pointer to SPI registers (selects the SPI block used). + * + * @return mxc_spi_mode_t \ref mxc_spi_mode_t + */ +mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); + +/** + * @brief Loads bytes into the transmit FIFO. * - * These functions should not be used while using non-blocking Transaction Level - * functions (Async or DMA) + * @param spi Pointer to SPI instance's registers. + * @param bytes The buffer containing the bytes to write + * @param len The number of bytes to write. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param intEn The interrupts to be enabled + * @return The number of bytes actually written. */ -void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); +unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); /** - * @brief Disables specific interrupts + * @brief Unloads bytes from the receive FIFO. * - * These functions should not be used while using non-blocking Transaction Level - * functions (Async or DMA) + * @param spi Pointer to SPI instance's registers. + * @param bytes The buffer to read the data into. + * @param len The number of bytes to read. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param intDis The interrupts to be disabled + * @return The number of bytes actually read. */ -void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); +unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); -/* ************************************************************************* */ -/* Transaction level functions */ -/* ************************************************************************* */ +/** + * @brief Sets the TX data to transmit as a 'dummy' byte + * + * In single wire master mode, this data is transmitted on MOSI when performing + * an RX (MISO) only transaction. This defaults to 0. + * + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param defaultTXData Data to shift out in RX-only transactions + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); + +/** + * @brief Enable/Disable HW CS control feature. + * + * Depending on the application, the user might need to manually drive the slave select pin. + * The SPI driver automatically drives the SS pin and this function enables/disables this + * feature. + * + * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. + */ +void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); +//////<<< Previous Implementation (SPI v1) + +/* ** DMA Functions ** */ + +/** + * @brief This function initializes the DMA for SPI DMA transactions. + * + * @note This function must run before any SPI DMA transactions. + * + * @param spi Pointer to SPI registers (selects the SPI block used). + * @param dma Pointer to DMA registers (selects the DMA block used). + * @param use_dma_tx True/False setting to initialize SPI DMA TX. Acquire DMA TX channel. + * @param use_dma_rx True/False setting to initialize SPI DMA RX. Acquire DMA RX channel. + * use_dma_tx must be true even if use_dma_rx is false. + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_DMA_Init(mxc_spi_regs_t *spi, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx); + +/** + * @brief Helper function that checks whether the MXC_SPI_Init function + * cfgalized DMA for SPI DMA transactons. + * + * @param spi Pointer to SPI instance's registers. + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +bool MXC_SPI_DMA_GetInitialized(mxc_spi_regs_t *spi); + +/** + * @brief Retreive the DMA TX Channel associated with SPI instance. + * + * @param spi Pointer to SPI instance's registers. + * + * @return If successful, the DMA TX Channel number is returned. Otherwise, see + * \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_DMA_GetTXChannel(mxc_spi_regs_t *spi); + +/** + * @brief Retreive the DMA RX Channel associated with SPI instance. + * + * @param spi Pointer to SPI instance's registers. + * + * @return If successful, the DMA RX Channel number is returned. Otherwise, see + * \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_DMA_GetRXChannel(mxc_spi_regs_t *spi); + +/** + * @brief Sets the SPI instance's DMA TX/RX request select. + * + * @param spi Pointer to SPI instance's registers. + * @param use_dma_tx True/False setting to set SPI DMA TX request select. + * @param use_dma_rx True/False setting to set SPI DMA RX request select. + * + * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + */ +int MXC_SPI_DMA_SetRequestSelect(mxc_spi_regs_t *spi, bool use_dma_tx, bool use_dma_rx); + +/* ** Transaction Functions ** */ /** * @brief Performs a blocking SPI transaction. @@ -540,7 +799,7 @@ void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); * 4. Unload RX FIFO as needed * 5. On SS Deassert, return * - * @param req Pointer to details of the transaction + * @param req Pointer to details of the transaction. * * @return See \ref MXC_Error_Codes for the list of error return codes. */ @@ -552,7 +811,7 @@ int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) * - * @param req Pointer to details of the transaction + * @param req Pointer to details of the transaction. * * @return See \ref MXC_Error_Codes for the list of error return codes. */ @@ -569,22 +828,57 @@ int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); * possible. The channel will be reset and returned to the system at the end of * the transaction. * - * @param req Pointer to details of the transaction + * @param req Pointer to details of the transaction. * * @return See \ref MXC_Error_Codes for the list of error return codes. */ int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); /** - * @brief Performs a blocking SPI transaction. + * @brief Set up a blocking, non-interrupt-driven SPI controller transaction. + * + * @param req Pointer to details of the transaction. * - * Performs a blocking SPI transaction. - * These actions will be performed in Slave Mode: - * 1. Fill FIFO with txData - * 2. Wait for SS Assert - * 3. If needed, pad txData with DefaultTXData - * 4. Unload RX FIFO as needed - * 5. On SS Deassert, return + * @return See \ref MXC_Error_Codes for the list of error return codes. + */ +int MXC_SPI_ControllerTransaction(mxc_spi_req_t *req); + +/** + * @brief Set up a non-blocking, interrupt-driven SPI controller transaction. + * + * The MXC_SPI_Handler function must be called in the selected SPI instance's + * interrupt handler to process the transaction. + * + * @param req Pointer to details of the transaction. + * + * @return See \ref MXC_Error_Codes for the list of error return codes. + */ +int MXC_SPI_ControllerTransactionAsync(mxc_spi_req_t *req); + +/** + * @brief Set up a non-blocking, DMA-driven SPI controller transaction. + * + * The MXC_SPI_Config(...) or MXC_SPI_DMA_Init(..). functions must be + * called before calling this DMA transaction function. This function + * does not initialize the DMA. + * + * @param req Pointer to details of the transaction. + * + * @return See \ref MXC_Error_Codes for the list of error return codes. + */ +int MXC_SPI_ControllerTransactionDMA(mxc_spi_req_t *req); + +/** + * @brief Set up a blocking, DMA-driven SPI controller transaction. + * + * @param req Pointer to details of the transaction. + * + * @return See \ref MXC_Error_Codes for the list of error return codes. + */ +int MXC_SPI_ControllerTransactionDMAB(mxc_spi_req_t *req); + +/** + * @brief Performs a blocking SPI transaction. * * @param req Pointer to details of the transaction * @@ -595,9 +889,6 @@ int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); /** * @brief Setup an interrupt-driven SPI transaction * - * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary - * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) - * * @param req Pointer to details of the transactionz * * @return See \ref MXC_Error_Codes for the list of error return codes. @@ -622,28 +913,37 @@ int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); /** - * @brief Sets the TX data to transmit as a 'dummy' byte - * - * In single wire master mode, this data is transmitted on MOSI when performing - * an RX (MISO) only transaction. This defaults to 0. + * @brief Setup a blocking SPI Target transaction. + * + * @param req Pointer to details of the transaction. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param defaultTXData Data to shift out in RX-only transactions + * @return See \ref MXC_Error_Codes for the list of error return codes. + */ +int MXC_SPI_TargetTransaction(mxc_spi_req_t *req); + +/** + * @brief Setup an interrupt-driven, non-blocking SPI Target transaction. + * + * @param req Pointer to details of the transaction. * - * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. + * @return See \ref MXC_Error_Codes for the list of error return codes. */ -int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); +int MXC_SPI_TargetTransactionAsync(mxc_spi_req_t *req); /** - * @brief Abort any asynchronous requests in progress. + * @brief Setup a DMA-driven SPI Target transaction. * - * Abort any asynchronous requests in progress. Any callbacks associated with - * the active transaction will be executed to indicate when the transaction - * has been terminated. + * The MXC_SPI_Config(...) or MXC_SPI_DMA_Init(..). functions must be + * called before calling this DMA transaction function. This function + * does not initialize the DMA. + * + * @param req Pointer to details of the transaction. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @return See \ref MXC_Error_Codes for the list of error return codes. */ -void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); +int MXC_SPI_TargetTransactionDMA(mxc_spi_req_t *req); + +/* ** Handler Functions ** */ /** * @brief The processing function for asynchronous transactions. @@ -652,21 +952,38 @@ void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); * function periodically. This can be done from within the SPI interrupt * handler or periodically by the application if SPI interrupts are disabled. * - * @param spi Pointer to SPI registers (selects the SPI block used.) + * @param spi Pointer to SPI instance's registers. */ void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); /** - * @brief Enable/Disable HW CS control feature. + * @brief The processing function for asynchronous transactions. * - * Depending on the application, the user might need to manually drive the slave select pin. - * The SPI driver automatically drives the SS pin and this function enables/disables this - * feature. + * When using the asynchronous functions, the application must call this + * function periodically. This can be done from within the SPI interrupt + * handler or periodically by the application if SPI interrupts are disabled. * - * @param spi Pointer to SPI registers (selects the SPI block used.) - * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. + * @param spi Pointer to SPI instance's registers. */ -void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); +void MXC_SPI_Handler(mxc_spi_regs_t *spi); + +/** + * @brief The processing function for DMA TX transactions. + * + * This function calls the callback function if only TX transaction was made. + * + * @param spi Pointer to SPI instance's registers. + */ +void MXC_SPI_DMA_TX_Handler(mxc_spi_regs_t *spi); + +/** + * @brief The processing function for DMA RX transactions. + * + * This function calls the callback function at the end of a TX/RX transaction. + * + * @param spi Pointer to SPI instance's registers. + */ +void MXC_SPI_DMA_RX_Handler(mxc_spi_regs_t *spi); /**@} end of group spi */ diff --git a/Libraries/PeriphDrivers/Source/SPI/spi_me18.c b/Libraries/PeriphDrivers/Source/SPI/spi_me18.c index bb6ed9b4d11..9fee2573d14 100644 --- a/Libraries/PeriphDrivers/Source/SPI/spi_me18.c +++ b/Libraries/PeriphDrivers/Source/SPI/spi_me18.c @@ -34,11 +34,18 @@ /* **** Definitions **** */ /* ************************************************************************** */ -int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, - unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins) +int MXC_SPI_Init(mxc_spi_regs_t *spi, mxc_spi_type_t controller_target, mxc_spi_interface_t if_mode, + int numTargets, uint8_t ts_active_pol_mask, uint32_t freq, mxc_spi_pins_t pins) { int spi_num; + // Remap input parameters for v1 implementation. + int masterMode = controller_target; + int quadModeUsed = if_mode; + int numSlaves = numTargets; + int ssPolarity = ts_active_pol_mask; + int hz = freq; + spi_num = MXC_SPI_GET_IDX(spi); MXC_ASSERT(spi_num >= 0); diff --git a/Libraries/PeriphDrivers/Source/SPI/spi_me18_v2.c b/Libraries/PeriphDrivers/Source/SPI/spi_me18_v2.c new file mode 100644 index 00000000000..0d7bf5a6d1a --- /dev/null +++ b/Libraries/PeriphDrivers/Source/SPI/spi_me18_v2.c @@ -0,0 +1,1075 @@ +/****************************************************************************** + * + * Copyright (C) 2024 Analog Devices, Inc. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ******************************************************************************/ + +#include +#include +#include +#include + +#include "mxc_device.h" +#include "mxc_assert.h" +#include "mxc_errors.h" +#include "mxc_lock.h" +#include "mxc_sys.h" +#include "mxc_delay.h" +#include "spi_reva2.h" +#include "spi.h" +#include "dma.h" +#include "gpio.h" + +/* **** Definitions **** */ + +/* ************************************************************************** */ + +// Max 3 Possible Target Select Options per SPI instance +#define MXC_SPI_TS0_MASK_POS (0) +#define MXC_SPI_TS1_MASK_POS (1) +#define MXC_SPI_TS2_MASK_POS (2) + +int MXC_SPI_Init(mxc_spi_regs_t *spi, mxc_spi_type_t controller_target, mxc_spi_interface_t if_mode, + int numTargets, uint8_t ts_active_pol_mask, uint32_t freq, mxc_spi_pins_t pins) +{ + int error; + int8_t spi_num; + mxc_spi_tscontrol_t ts_control; + mxc_gpio_cfg_t temp_ts_cfg; // TS pins. + mxc_gpio_vssel_t vssel; + + spi_num = MXC_SPI_GET_IDX(spi); + if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { + return E_BAD_PARAM; + } + + // Check if frequency is too high + if ((spi_num == 0) && (freq > MXC_SPI_GetPeripheralClock(spi))) { + return E_BAD_PARAM; + } + + if ((spi_num == 1) && (freq > SystemCoreClock)) { + return E_BAD_PARAM; + } + +#ifndef MSDK_NO_GPIO_CLK_INIT + if (pins.vddioh) { + vssel = MXC_GPIO_VSSEL_VDDIOH; + } else { + vssel = MXC_GPIO_VSSEL_VDDIO; + } + + // SPI Target mode only supports HW_AUTO. + if (pins.ss0 || pins.ss1 || pins.ss2 || (controller_target == MXC_SPI_TYPE_TARGET)) { + ts_control = MXC_SPI_TSCONTROL_HW_AUTO; + } else { + ts_control = MXC_SPI_TSCONTROL_SW_APP; + } + + error = MXC_SPI_RevA2_SetTSControl((mxc_spi_reva_regs_t *)spi, ts_control); + if (error != E_NO_ERROR) { + return error; + } + + // Configure SPI peripheral and pins. + if (spi == MXC_SPI0) { // <--------------------------------------- SPI0 + MXC_SYS_Reset_Periph(MXC_SYS_RESET0_SPI0); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI0); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + error = MXC_GPIO_Config(&gpio_cfg_spi0_standard); + break; + + case MXC_SPI_INTERFACE_QUAD: + error = MXC_GPIO_Config(&gpio_cfg_spi0_quad); + break; + + case MXC_SPI_INTERFACE_3WIRE: + error = MXC_GPIO_Config(&gpio_cfg_spi0_3wire); + break; + + case MXC_SPI_INTERFACE_DUAL: + error = MXC_GPIO_Config(&gpio_cfg_spi1_dual); + break; + + default: + return E_BAD_PARAM; + } + + if (error != E_NO_ERROR) { + return error; + } + + // Set up HW TS pins (if HW_AUTO TS control scheme was selected). + // Voltage and drive strength settings will match the SPI pins. + if (ts_control == MXC_SPI_TSCONTROL_HW_AUTO) { + // Target Select 0 - TS0 (L. SS0 pin) + if (pins.ss0 == true) { + temp_ts_cfg = gpio_cfg_spi0_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 1 - TS1 (L. SS1 pin) + if (pins.ss1 == true) { + temp_ts_cfg = gpio_cfg_spi0_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + } + + } else if (spi == MXC_SPI1) { // <--------------------------------------- SPI1 + MXC_SYS_Reset_Periph(MXC_SYS_RESET0_SPI1); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI1); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + error = MXC_GPIO_Config(&gpio_cfg_spi1_standard); + break; + + case MXC_SPI_INTERFACE_QUAD: + error = MXC_GPIO_Config(&gpio_cfg_spi1_quad_0); + error |= MXC_GPIO_Config(&gpio_cfg_spi1_quad_1); + if (error != E_NO_ERROR) { + error = E_FAIL; + } + + break; + + case MXC_SPI_INTERFACE_3WIRE: + error = MXC_GPIO_Config(&gpio_cfg_spi1_3wire); + break; + + case MXC_SPI_INTERFACE_DUAL: + error = MXC_GPIO_Config(&gpio_cfg_spi1_dual); + break; + + default: + return E_BAD_PARAM; + } + + if (error != E_NO_ERROR) { + return error; + } + + // Set up HW TS pins (if HW_AUTO TS control scheme was selected). + // Voltage and drive strength settings will match the SPI pins. + if (ts_control == MXC_SPI_TSCONTROL_HW_AUTO) { + // Target Select 0 - TS0 (L. SS0 pin) + if (pins.ss0 == true) { + temp_ts_cfg = gpio_cfg_spi1_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 1 - TS1 (L. SS1 pin) + if (pins.ss1 == true) { + temp_ts_cfg = gpio_cfg_spi1_ts1; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 2 - TS1 (L. SS2 pin) + if (pins.ss2 == true) { + temp_ts_cfg = gpio_cfg_spi1_ts2; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + } + + } else if (spi == MXC_SPI2) { // <--------------------------------------- SPI2 + MXC_SYS_Reset_Periph(MXC_SYS_RESET0_SPI2); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI2); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + error = MXC_GPIO_Config(&gpio_cfg_spi2_standard); + break; + + case MXC_SPI_INTERFACE_QUAD: + error = MXC_GPIO_Config(&gpio_cfg_spi2_quad_0); + error |= MXC_GPIO_Config(&gpio_cfg_spi2_quad_1); + if (error != E_NO_ERROR) { + error = E_FAIL; + } + + break; + + case MXC_SPI_INTERFACE_3WIRE: + error = MXC_GPIO_Config(&gpio_cfg_spi2_3wire); + break; + + case MXC_SPI_INTERFACE_DUAL: + error = MXC_GPIO_Config(&gpio_cfg_spi2_dual); + break; + + default: + return E_BAD_PARAM; + } + + if (error != E_NO_ERROR) { + return error; + } + + // Set up HW TS pins (if HW_AUTO TS control scheme was selected). + // Voltage and drive strength settings will match the SPI pins. + if (ts_control == MXC_SPI_TSCONTROL_HW_AUTO) { + // Target Select 0 - TS0 (L. SS0 pin) + if (pins.ss0 == true) { + temp_ts_cfg = gpio_cfg_spi2_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 1 - TS1 (L. SS1 pin) + if (pins.ss1 == true) { + temp_ts_cfg = gpio_cfg_spi2_ts1; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 2 - TS1 (L. SS2 pin) + if (pins.ss2 == true) { + temp_ts_cfg = gpio_cfg_spi2_ts2; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + } + +#ifndef __riscv + } else if (spi == MXC_SPI3) { // <--------------------------------------- SPI3 + MXC_SYS_Reset_Periph(MXC_SYS_RESET1_SPI3); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI3); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + error = MXC_GPIO_Config(&gpio_cfg_spi3_standard); + break; + + case MXC_SPI_INTERFACE_QUAD: + error = MXC_GPIO_Config(&gpio_cfg_spi3_quad); + break; + + case MXC_SPI_INTERFACE_3WIRE: + error = MXC_GPIO_Config(&gpio_cfg_spi3_3wire); + break; + + case MXC_SPI_INTERFACE_DUAL: + error = MXC_GPIO_Config(&gpio_cfg_spi3_dual); + break; + + default: + return E_BAD_PARAM; + } + + if (error != E_NO_ERROR) { + return error; + } + + // Set up HW TS pins (if HW_AUTO TS control scheme was selected). + // Voltage and drive strength settings will match the SPI pins. + if (ts_control == MXC_SPI_TSCONTROL_HW_AUTO) { + // Target Select 0 - TS0 (L. SS0 pin) + if (pins.ss0 == true) { + temp_ts_cfg = gpio_cfg_spi3_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 1 - TS1 (L. SS1 pin) + if (pins.ss1 == true) { + temp_ts_cfg = gpio_cfg_spi3_ts1; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 2 - TS1 (L. SS2 pin) + if (pins.ss2 == true) { + temp_ts_cfg = gpio_cfg_spi3_ts2; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + } + + } else if (spi == MXC_SPI4) { // <--------------------------------------- SPI4 + MXC_SYS_Reset_Periph(MXC_SYS_RESET1_SPI4); + MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_SPI4); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + error = MXC_GPIO_Config(&gpio_cfg_spi4_standard); + break; + + case MXC_SPI_INTERFACE_QUAD: + error = MXC_GPIO_Config(&gpio_cfg_spi4_quad); + break; + + case MXC_SPI_INTERFACE_3WIRE: + error = MXC_GPIO_Config(&gpio_cfg_spi4_3wire); + break; + + case MXC_SPI_INTERFACE_DUAL: + error = MXC_GPIO_Config(&gpio_cfg_spi4_dual); + break; + + default: + return E_BAD_PARAM; + } + + if (error != E_NO_ERROR) { + return error; + } + + // Set up HW TS pins (if HW_AUTO TS control scheme was selected). + // Voltage and drive strength settings will match the SPI pins. + if (ts_control == MXC_SPI_TSCONTROL_HW_AUTO) { + // Target Select 0 - TS0 (L. SS0 pin) + if (pins.ss0 == true) { + temp_ts_cfg = gpio_cfg_spi4_ts0; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 1 - TS1 (L. SS1 pin) + if (pins.ss1 == true) { + temp_ts_cfg = gpio_cfg_spi4_ts1; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + + // Target Select 2 - TS1 (L. SS2 pin) + if (pins.ss2 == true) { + temp_ts_cfg = gpio_cfg_spi4_ts2; + temp_ts_cfg.vssel = vssel; + temp_ts_cfg.drvstr = pins.drvstr; + + error = MXC_GPIO_Config(&temp_ts_cfg); + if (error != E_NO_ERROR) { + return error; + } + } + } +#endif // __riscv + } else { + return E_NO_DEVICE; + } +#else + (void)pins; +#endif // MSDK_NO_GPIO_CLK_INIT + + return MXC_SPI_RevA2_Init((mxc_spi_reva_regs_t *)spi, controller_target, if_mode, freq, + ts_active_pol_mask); +} + +int MXC_SPI_Config(mxc_spi_cfg_t *cfg) +{ + return MXC_SPI_RevA2_Config(cfg); +} + +int MXC_SPI_ConfigStruct(mxc_spi_cfg_t *cfg, bool use_dma_tx, bool use_dma_rx) +{ + if (cfg == NULL) { + return E_BAD_PARAM; + } + + cfg->spi = MXC_SPI0; // SPI1 is available on both the ARM and RISCV core. + cfg->clk_mode = MXC_SPI_CLKMODE_0; // 0 - CPOL :: 0 - CPHA + + if (use_dma_tx || use_dma_rx) { + cfg->use_dma_tx = use_dma_tx; + cfg->use_dma_rx = use_dma_rx; + cfg->dma = MXC_DMA; + } else { + cfg->use_dma_tx = false; + cfg->use_dma_rx = false; + cfg->dma = NULL; + } + + return E_SUCCESS; +} + +int MXC_SPI_Shutdown(mxc_spi_regs_t *spi) +{ + int8_t spi_num; + + spi_num = MXC_SPI_GET_IDX(spi); + if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { + return E_BAD_PARAM; + } + + MXC_SPI_RevA2_Shutdown((mxc_spi_reva_regs_t *)spi); + + if (spi == MXC_SPI0) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPI0); + } else if (spi == MXC_SPI1) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPI1); + } else if (spi == MXC_SPI2) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPI2); +#ifndef __riscv + } else if (spi == MXC_SPI3) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPI3); + } else if (spi == MXC_SPI4) { + MXC_SYS_ClockDisable(MXC_SYS_PERIPH_CLOCK_SPI4); +#endif //__riscv + } else { + return E_NO_DEVICE; + } + + return E_NO_ERROR; +} + +unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi) +{ + return (unsigned int)MXC_SPI_RevA2_GetFlags((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_ClearFlags((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn) +{ + MXC_SPI_RevA2_EnableInt((mxc_spi_reva_regs_t *)spi, (uint32_t)intEn); +} + +void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis) +{ + MXC_SPI_RevA2_DisableInt((mxc_spi_reva_regs_t *)spi, (uint32_t)intDis); +} + +int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi) +{ + int clk_freq = 0; + + if (MXC_SPI_GET_IDX(spi) >= 0 && MXC_SPI_GET_IDX(spi) < 3) { + clk_freq = PeripheralClock; + } else if (MXC_SPI_GET_IDX(spi) >= 3) { + uint32_t clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL) >> + MXC_F_GCR_CLKCTRL_SYSCLK_SEL_POS; + switch (clk_src) { + case MXC_SYS_CLOCK_IPO: + clk_freq = IPO_FREQ; + break; + case MXC_SYS_CLOCK_ERFO: + clk_freq = ERFO_FREQ; + break; + case MXC_SYS_CLOCK_IBRO: + clk_freq = IBRO_FREQ; + break; + case MXC_SYS_CLOCK_ISO: + clk_freq = ISO_FREQ; + break; + case MXC_SYS_CLOCK_INRO: + clk_freq = INRO_FREQ; + break; + case MXC_SYS_CLOCK_ERTCO: + clk_freq = ERTCO_FREQ; + break; + case MXC_SYS_CLOCK_EXTCLK: + clk_freq = EXTCLK_FREQ; + break; + default: + return E_BAD_PARAM; + } + } else { + return E_BAD_PARAM; + } + + return (clk_freq / 2); +} + +int MXC_SPI_SetTSControl(mxc_spi_regs_t *spi, mxc_spi_tscontrol_t ts_control) +{ + return MXC_SPI_RevA2_SetTSControl((mxc_spi_reva_regs_t *)spi, ts_control); +} + +mxc_spi_tscontrol_t MXC_SPI_GetTSControl(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetTSControl((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz) +{ + return MXC_SPI_RevA2_SetFrequency((mxc_spi_reva_regs_t *)spi, hz); +} + +unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetFrequency((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetFrameSize(mxc_spi_regs_t *spi, int frame_size) +{ + return MXC_SPI_RevA2_SetFrameSize((mxc_spi_reva_regs_t *)spi, frame_size); +} + +int MXC_SPI_GetFrameSize(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetFrameSize((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetInterface(mxc_spi_regs_t *spi, mxc_spi_interface_t mode) +{ + return MXC_SPI_RevA2_SetInterface((mxc_spi_reva_regs_t *)spi, mode); +} + +mxc_spi_interface_t MXC_SPI_GetInterface(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetInterface((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetClkMode(mxc_spi_regs_t *spi, mxc_spi_clkmode_t clk_mode) +{ + return MXC_SPI_RevA2_SetClkMode((mxc_spi_reva_regs_t *)spi, clk_mode); +} + +mxc_spi_clkmode_t MXC_SPI_GetClkMode(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetClkMode((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetCallback(mxc_spi_regs_t *spi, mxc_spi_callback_t completeCB, void *data) +{ + return MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)spi, completeCB, data); +} + +int MXC_SPI_GetActive(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetActive((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_ReadyForSleep((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetDummyTX(mxc_spi_regs_t *spi, uint16_t tx_value) +{ + return MXC_SPI_RevA2_SetDummyTX((mxc_spi_reva_regs_t *)spi, tx_value); +} + +int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_StartTransmission((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_AbortTransmission((mxc_spi_reva_regs_t *)spi); +} + +unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetTXFIFOAvailable((mxc_spi_reva_regs_t *)spi); +} + +unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetRXFIFOAvailable((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_ClearTXFIFO((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_ClearRXFIFO((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes) +{ + return (int)MXC_SPI_RevA2_SetTXThreshold((mxc_spi_reva_regs_t *)spi, numBytes); +} + +int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes) +{ + return (int)MXC_SPI_RevA2_SetRXThreshold((mxc_spi_reva_regs_t *)spi, numBytes); +} + +unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi) +{ + return (unsigned int)MXC_SPI_RevA2_GetTXThreshold((mxc_spi_reva_regs_t *)spi); +} + +unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi) +{ + return (unsigned int)MXC_SPI_RevA2_GetRXThreshold((mxc_spi_reva_regs_t *)spi); +} + +/* ** DMA-Specific Functions ** */ + +int MXC_SPI_DMA_Init(mxc_spi_regs_t *spi, mxc_dma_regs_t *dma, bool use_dma_tx, bool use_dma_rx) +{ + return MXC_SPI_RevA2_DMA_Init((mxc_spi_reva_regs_t *)spi, (mxc_dma_reva_regs_t *)dma, + use_dma_tx, use_dma_rx); +} + +bool MXC_SPI_DMA_GetInitialized(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_DMA_GetInitialized((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_DMA_GetTXChannel(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_DMA_GetTXChannel((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_DMA_GetRXChannel(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_DMA_GetRXChannel((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_DMA_SetRequestSelect(mxc_spi_regs_t *spi, bool use_dma_tx, bool use_dma_rx) +{ + int8_t spi_num; + int tx_reqsel = -1; + int rx_reqsel = -1; + + spi_num = MXC_SPI_GET_IDX(spi); + if (spi_num < 0 || spi_num >= MXC_SPI_INSTANCES) { + return E_INVALID; + } + + if (use_dma_tx) { + switch (spi_num) { + case 0: + tx_reqsel = MXC_DMA_REQUEST_SPI0TX; + break; + + case 1: + tx_reqsel = MXC_DMA_REQUEST_SPI1TX; + break; + + case 2: + tx_reqsel = MXC_DMA_REQUEST_SPI2TX; + break; + + case 3: + tx_reqsel = MXC_DMA_REQUEST_SPI3TX; + break; + + case 4: + tx_reqsel = MXC_DMA_REQUEST_SPI4TX; + break; + + default: + return E_BAD_PARAM; + } + } + + if (use_dma_rx) { + switch (spi_num) { + case 0: + rx_reqsel = MXC_DMA_REQUEST_SPI0RX; + break; + + case 1: + rx_reqsel = MXC_DMA_REQUEST_SPI1RX; + break; + + case 2: + rx_reqsel = MXC_DMA_REQUEST_SPI2RX; + break; + + case 3: + rx_reqsel = MXC_DMA_REQUEST_SPI3RX; + break; + + case 4: + rx_reqsel = MXC_DMA_REQUEST_SPI4RX; + break; + + default: + return E_BAD_PARAM; + } + } + + return MXC_SPI_RevA2_DMA_SetRequestSelect((mxc_spi_reva_regs_t *)spi, tx_reqsel, rx_reqsel); +} + +/* ** Transaction Functions ** */ + +int MXC_SPI_MasterTransaction(mxc_spi_req_t *req) +{ + return MXC_SPI_RevA2_ControllerTransaction((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, req->ssDeassert, + req->ssIdx); +} + +int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_ControllerTransactionAsync((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + req->ssDeassert, req->ssIdx); +} + +int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_ControllerTransactionDMA((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + req->ssDeassert, req->ssIdx, + (mxc_dma_reva_regs_t *)MXC_DMA); +} + +int MXC_SPI_ControllerTransaction(mxc_spi_req_t *req) +{ + return MXC_SPI_RevA2_ControllerTransaction((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, req->ssDeassert, + req->ssIdx); +} + +int MXC_SPI_ControllerTransactionAsync(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_ControllerTransactionAsync((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + req->ssDeassert, req->ssIdx); +} + +int MXC_SPI_ControllerTransactionDMA(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_ControllerTransactionDMA((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + req->ssDeassert, req->ssIdx, + (mxc_dma_reva_regs_t *)MXC_DMA); +} + +int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req) +{ + return MXC_SPI_RevA2_TargetTransaction((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen); +} + +int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_TargetTransactionAsync((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen); +} + +int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req) +{ + int error; + + // Users can set their own callback and pass in their own data if they choose to. + if (req->completeCB != NULL) { + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + } + + return MXC_SPI_RevA2_TargetTransactionDMA((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + (mxc_dma_reva_regs_t *)MXC_DMA); +} + +int MXC_SPI_TargetTransaction(mxc_spi_req_t *req) +{ + return MXC_SPI_RevA2_TargetTransaction((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen); +} + +int MXC_SPI_TargetTransactionAsync(mxc_spi_req_t *req) +{ + int error; + + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + + return MXC_SPI_RevA2_TargetTransactionAsync((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen); +} + +int MXC_SPI_TargetTransactionDMA(mxc_spi_req_t *req) +{ + int error; + + error = MXC_SPI_RevA2_SetCallback((mxc_spi_reva_regs_t *)(req->spi), req->completeCB, req); + if (error != E_NO_ERROR) { + return error; + } + + return MXC_SPI_RevA2_TargetTransactionDMA((mxc_spi_reva_regs_t *)(req->spi), req->txData, + req->txLen, req->rxData, req->rxLen, + (mxc_dma_reva_regs_t *)MXC_DMA); +} + +/* ** Handler Functions ** */ + +void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_Handler((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_Handler(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_Handler((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_DMA_TX_Handler(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_DMA_TX_Handler((mxc_spi_reva_regs_t *)spi); +} + +void MXC_SPI_DMA_RX_Handler(mxc_spi_regs_t *spi) +{ + MXC_SPI_RevA2_DMA_RX_Handler((mxc_spi_reva_regs_t *)spi); +} + +/* ** Unsupported-Legacy Functions from Previous Implementation ** */ + +int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize) +{ + return MXC_SPI_RevA2_SetFrameSize((mxc_spi_reva_regs_t *)spi, dataSize); +} + +int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi) +{ + return MXC_SPI_RevA2_GetFrameSize((mxc_spi_reva_regs_t *)spi); +} + +int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth) +{ + switch (spiWidth) { + case SPI_WIDTH_3WIRE: + return MXC_SPI_SetInterface(spi, MXC_SPI_INTERFACE_3WIRE); + + case SPI_WIDTH_STANDARD: + return MXC_SPI_SetInterface(spi, MXC_SPI_INTERFACE_STANDARD); + + case SPI_WIDTH_DUAL: + return MXC_SPI_SetInterface(spi, MXC_SPI_INTERFACE_DUAL); + break; + + case SPI_WIDTH_QUAD: + return MXC_SPI_SetInterface(spi, MXC_SPI_INTERFACE_QUAD); + + default: + return E_BAD_PARAM; + } +} + +mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi) +{ + mxc_spi_interface_t if_mode; + + if_mode = MXC_SPI_GetInterface(spi); + + switch (if_mode) { + case MXC_SPI_INTERFACE_STANDARD: + return SPI_WIDTH_STANDARD; + + case MXC_SPI_INTERFACE_QUAD: + return SPI_WIDTH_QUAD; + + case MXC_SPI_INTERFACE_DUAL: + return SPI_WIDTH_DUAL; + + case MXC_SPI_INTERFACE_3WIRE: + return SPI_WIDTH_3WIRE; + + default: + return SPI_WIDTH_STANDARD; + } +} + +void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi) +{ + MXC_SPI_AbortTransmission(spi); +} + +int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx) +{ + return E_NOT_SUPPORTED; +} + +int MXC_SPI_GetSlave(mxc_spi_regs_t *spi) +{ + return E_NOT_SUPPORTED; +} + +int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode) +{ + switch (spiMode) { + case SPI_MODE_0: + return MXC_SPI_SetClkMode(spi, MXC_SPI_CLKMODE_0); + + case SPI_MODE_1: + return MXC_SPI_SetClkMode(spi, MXC_SPI_CLKMODE_1); + + case SPI_MODE_2: + return MXC_SPI_SetClkMode(spi, MXC_SPI_CLKMODE_2); + + case SPI_MODE_3: + return MXC_SPI_SetClkMode(spi, MXC_SPI_CLKMODE_3); + + default: + return E_BAD_PARAM; + } +} + +mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi) +{ + mxc_spi_clkmode_t clk_mode; + + clk_mode = MXC_SPI_GetClkMode(spi); + + switch (clk_mode) { + case MXC_SPI_CLKMODE_0: + return SPI_MODE_0; + + case MXC_SPI_CLKMODE_1: + return SPI_MODE_1; + + case MXC_SPI_CLKMODE_2: + return SPI_MODE_2; + + case MXC_SPI_CLKMODE_3: + return SPI_MODE_3; + + default: + return SPI_MODE_0; + } +} + +int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData) +{ + return MXC_SPI_RevA2_SetDummyTX((mxc_spi_reva_regs_t *)spi, defaultTXData); +} + +void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state) +{ + MXC_ASSERT(0); +} diff --git a/Libraries/PeriphDrivers/Source/SYS/pins_me18.c b/Libraries/PeriphDrivers/Source/SYS/pins_me18.c index 2f1bf5f8a90..82895b49fde 100644 --- a/Libraries/PeriphDrivers/Source/SYS/pins_me18.c +++ b/Libraries/PeriphDrivers/Source/SYS/pins_me18.c @@ -266,7 +266,7 @@ const mxc_gpio_cfg_t gpio_cfg_can1 = { MXC_GPIO2, (MXC_GPIO_PIN_24 | MXC_GPIO_PI // SPI v2 Pin Definitions const mxc_gpio_cfg_t gpio_cfg_spi0_standard = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), - MXC_GPIO_FUNC_ALT1, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; + MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_spi0_3wire = { MXC_GPIO2, (MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT2, MXC_GPIO_PAD_NONE, MXC_GPIO_VSSEL_VDDIO, MXC_GPIO_DRVSTR_0 }; const mxc_gpio_cfg_t gpio_cfg_spi0_dual = { MXC_GPIO2, (MXC_GPIO_PIN_27 | MXC_GPIO_PIN_28 | MXC_GPIO_PIN_29), MXC_GPIO_FUNC_ALT1, diff --git a/Libraries/PeriphDrivers/libPeriphDriver.mk b/Libraries/PeriphDrivers/libPeriphDriver.mk index 1866958221e..4ebba45947e 100644 --- a/Libraries/PeriphDrivers/libPeriphDriver.mk +++ b/Libraries/PeriphDrivers/libPeriphDriver.mk @@ -34,26 +34,10 @@ # ############################################################################## -# This is the name of the build output file -PROJECT_NAME=libPeriphDriver - # Specify the project variant. -ifeq "$(MFLOAT_ABI)" "hardfp" -PROJECT_VARIANT=hardfp -else -ifeq "$(MFLOAT_ABI)" "hard" -PROJECT_VARIANT=hardfp -else -PROJECT_VARIANT=softfp -endif -endif +PERIPH_DRIVER_LIB_FILENAME ?= libPeriphDriver_$(MFLOAT_ABI) -# Use these to specify the project. -ifeq "$(PROJECT_VARIANT)" "" -override PROJECT=$(PROJECT_NAME) -else -override PROJECT=$(PROJECT_NAME)_$(PROJECT_VARIANT) -endif +override PROJECT = $(PERIPH_DRIVER_LIB_FILENAME) ifeq "$(TARGET)" "" $(error TARGET must be specified) diff --git a/Libraries/PeriphDrivers/max32690_files.mk b/Libraries/PeriphDrivers/max32690_files.mk index 1bd1e502eee..1e3908079d9 100644 --- a/Libraries/PeriphDrivers/max32690_files.mk +++ b/Libraries/PeriphDrivers/max32690_files.mk @@ -126,8 +126,18 @@ PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SEMA/sema_me18.c PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SEMA/sema_reva.c PERIPH_DRIVER_INCLUDE_DIR += $(SOURCE_DIR)/SPI +export MXC_SPI_VERSION +ifeq ($(MXC_SPI_VERSION),v1) +# SPI v1 (Legacy) Implementation PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SPI/spi_me18.c PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SPI/spi_reva1.c +else +ifeq ($(MXC_SPI_VERSION),v2) +# SPI v2 Implementation +PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SPI/spi_me18_v2.c +PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SPI/spi_reva2.c +endif +endif PERIPH_DRIVER_INCLUDE_DIR += $(SOURCE_DIR)/SPIXF PERIPH_DRIVER_C_FILES += $(SOURCE_DIR)/SPIXF/spixf_me18.c diff --git a/Libraries/PeriphDrivers/periphdriver.mk b/Libraries/PeriphDrivers/periphdriver.mk index e7cce015582..5958038f131 100644 --- a/Libraries/PeriphDrivers/periphdriver.mk +++ b/Libraries/PeriphDrivers/periphdriver.mk @@ -33,21 +33,39 @@ TARGET_LC ?= $(subst M,m,$(subst A,a,$(subst X,x,$(TARGET)))) # Specify the library variant. ifeq "$(MFLOAT_ABI)" "hardfp" -LIBRARY_VARIANT=hardfp +PD_LIBRARY_VARIANT=hardfp else ifeq "$(MFLOAT_ABI)" "hard" -LIBRARY_VARIANT=hardfp +PD_LIBRARY_VARIANT=hardfp else -LIBRARY_VARIANT=softfp +PD_LIBRARY_VARIANT=softfp endif endif +MXC_SPI_VERSION ?= v1 +# Selects the SPI drivers to build with. Acceptable values are: +# - v1 +# - v2 +ifneq "$(MXC_SPI_VERSION)" "" +PD_LIBRARY_VARIANT := spi-$(MXC_SPI_VERSION)_$(PD_LIBRARY_VARIANT) +endif +ifeq "$(MXC_SPI_VERSION)" "v1" +PROJ_CFLAGS+=-DMXC_SPI_V1 +else +ifeq "$(MXC_SPI_VERSION)" "v2" +PROJ_CFLAGS+=-DMXC_SPI_V2 +else +$(error Invalid value for MXC_SPI_VERSION = "$(MXC_SPI_VERSION)" Acceptable values are "v1" or "v2") +endif +endif + + # Specify the build directory if not defined by the project ifeq "$(BUILD_DIR)" "" ifeq "$(RISCV_CORE)" "" -PERIPH_DRIVER_BUILD_DIR=${PERIPH_DRIVER_DIR}/bin/$(TARGET_UC)/$(LIBRARY_VARIANT) +PERIPH_DRIVER_BUILD_DIR=${PERIPH_DRIVER_DIR}/bin/$(TARGET_UC)/$(PD_LIBRARY_VARIANT) else -PERIPH_DRIVER_BUILD_DIR=${PERIPH_DRIVER_DIR}/bin/$(TARGET_UC)/$(LIBRARY_VARIANT)_riscv +PERIPH_DRIVER_BUILD_DIR=${PERIPH_DRIVER_DIR}/bin/$(TARGET_UC)/$(PD_LIBRARY_VARIANT)_riscv endif else PERIPH_DRIVER_BUILD_DIR=$(BUILD_DIR)/PeriphDriver @@ -67,11 +85,12 @@ export COMPILER include ${PERIPH_DRIVER_DIR}/$(TARGET_LC)_files.mk IPATH += ${PERIPH_DRIVER_INCLUDE_DIR} -ifeq "$(LIBRARY_VARIANT)" "" -PERIPH_DRIVER_LIB := libPeriphDriver.a +ifeq "$(PD_LIBRARY_VARIANT)" "" +PERIPH_DRIVER_LIB_FILENAME := libPeriphDriver else -PERIPH_DRIVER_LIB := libPeriphDriver_$(LIBRARY_VARIANT).a +PERIPH_DRIVER_LIB_FILENAME := libPeriphDriver_$(PD_LIBRARY_VARIANT) endif +PERIPH_DRIVER_LIB := $(PERIPH_DRIVER_LIB_FILENAME).a # export PERIPH_DRIVER_DIR export PERIPH_DRIVER_LIB export PERIPH_DRIVER_BUILD_DIR @@ -80,7 +99,7 @@ export PERIPH_DRIVER_BUILD_DIR LIBS += ${PERIPH_DRIVER_BUILD_DIR}/${PERIPH_DRIVER_LIB} # Add rule to build the Driver Library ${PERIPH_DRIVER_BUILD_DIR}/${PERIPH_DRIVER_LIB}: ${PERIPH_DRIVER_C_FILES} ${PERIPH_DRIVER_A_FILES} ${PROJECTMK} - @$(MAKE) -f ${PERIPH_DRIVER_DIR}/libPeriphDriver.mk lib BUILD_DIR=${PERIPH_DRIVER_BUILD_DIR} PROJ_CFLAGS="$(PROJ_CFLAGS)" PROJ_LDFLAGS="$(PROJ_LDFLAGS)" MXC_OPTIMIZE_CFLAGS=$(MXC_OPTIMIZE_CFLAGS) MFLOAT_ABI=$(MFLOAT_ABI) DUAL_CORE=$(DUAL_CORE) RISCV_CORE=$(RISCV_CORE) PROJECTMK=$(PROJECTMK) + @$(MAKE) -f ${PERIPH_DRIVER_DIR}/libPeriphDriver.mk lib BUILD_DIR=${PERIPH_DRIVER_BUILD_DIR} PROJ_CFLAGS="$(PROJ_CFLAGS)" PROJ_LDFLAGS="$(PROJ_LDFLAGS)" MXC_OPTIMIZE_CFLAGS=$(MXC_OPTIMIZE_CFLAGS) MFLOAT_ABI=$(MFLOAT_ABI) DUAL_CORE=$(DUAL_CORE) RISCV_CORE=$(RISCV_CORE) PROJECTMK=$(PROJECTMK) PERIPH_DRIVER_LIB_FILENAME=$(PERIPH_DRIVER_LIB_FILENAME) clean.periph: - @$(MAKE) -f ${PERIPH_DRIVER_DIR}/libPeriphDriver.mk BUILD_DIR=${PERIPH_DRIVER_BUILD_DIR} clean + @$(MAKE) -f ${PERIPH_DRIVER_DIR}/libPeriphDriver.mk BUILD_DIR=${PERIPH_DRIVER_BUILD_DIR} PERIPH_DRIVER_LIB_FILENAME=$(PERIPH_DRIVER_LIB_FILENAME) clean diff --git a/USERGUIDE.md b/USERGUIDE.md index d17949f1ee6..3a79b576b3c 100644 --- a/USERGUIDE.md +++ b/USERGUIDE.md @@ -2387,6 +2387,12 @@ The SPI v2 Library is the latest version of the MSDK SPI drivers which highlight - Still supports SPI v1 function prototypes for backwards-compatibility. - Bug fixes from the SPI v1 API. +#### SPI v2 Supported Parts + +- MAX32572 +- MAX32690 +- MAX78002 + #### Porting Projects to use SPI v2 The latest SPI examples in the MSDK defaults to build the SPI v1 libraries. Set the `MXC_SPI_VERSION` [build configuration variable](#build-configuration-variables) to `v2` (case sensitive) use the SPI v2 API. diff --git a/mxc_version.h b/mxc_version.h index ac20ab210c3..9f6157da2e0 100644 --- a/mxc_version.h +++ b/mxc_version.h @@ -24,7 +24,7 @@ * Format: `[Release tag]-[commits since release tag]-g[commit SHA]` * If exactly on a release tag, this string will match the tag */ -#define MSDK_VERSION_STRING "v2024_02-25-g3a91bd6c4a" +#define MSDK_VERSION_STRING "v2024_02-33-g2895589c63" /** * @brief The month of the current MSDK version */