fix 6502 codegen error for mixed case register params and normal params

irmen · Feb 10, 2025 · 17334a1 · 17334a1
1 parent c7f0ff1
commit 17334a1
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Showing 3 changed files with 16 additions and 10 deletions.
diff --git a/.idea/misc.xml b/.idea/misc.xml
diff --git a/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt b/codeGenCpu6502/src/prog8/codegen/cpu6502/FunctionCallAsmGen.kt
@@ -135,15 +135,16 @@ internal class FunctionCallAsmGen(private val program: PtProgram, private val as
                 useCpuRegistersForArgs(call.args, sub)
             } else {
                 // arguments via variables
-                val (normalParams, registerParams) = sub.parameters.withIndex().partition { it.value.register == null }
+                val paramValues = sub.parameters.zip(call.args)
+                val (normalParams, registerParams) = paramValues.partition { it.first.register == null }
                 if (normalParams.isNotEmpty()) {
-                    for (arg in normalParams.zip(call.args))
-                        argumentViaVariable(sub, arg.first.value, arg.second)
+                    for (p in normalParams)
+                        argumentViaVariable(sub, p.first, p.second)
                 }
                 if (registerParams.isNotEmpty()) {
                     // the R0-R15 'registers' are not really registers. They're just special variables.
-                    for (arg in registerParams.zip(call.args))
-                        argumentViaVariable(sub, arg.first.value, arg.second)
+                    for (p in registerParams)
+                        argumentViaVariable(sub, p.first, p.second)
                 }
             }
             asmgen.out("  jsr  $subAsmName")

diff --git a/examples/test.p8 b/examples/test.p8
@@ -1,11 +1,16 @@
+%import textio
+%zeropage basicsafe
+
 main {
 
     sub start() {
-        str minString1 = 1234
-        str minString2 = func()
+        func($11,$22,$33,$44)
     }
 
-    sub func() -> str {
-        return "zz"
+    sub func(ubyte arg1, ubyte arg2 @R1, ubyte arg3 @R2, ubyte arg4) {
+        txt.print_ubhex(arg1, false)
+        txt.print_ubhex(arg2, false)
+        txt.print_ubhex(arg3, false)
+        txt.print_ubhex(arg4, false)
     }
 }