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read_verilog capabilities? #30

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AliRady opened this issue Apr 2, 2017 · 0 comments
Open

read_verilog capabilities? #30

AliRady opened this issue Apr 2, 2017 · 0 comments

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@AliRady
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AliRady commented Apr 2, 2017

Hello,

Thank you for all your support on the package. I had a few questions.

I'm trying to read a verilog description of an adder "RCA_N16.v" and the package seems to be having trouble with it. It is from the adder library associated with one of your papers.

I'm writing it simply as read_verilog -a RCA_N16.v

Furthermore, in your paper "BDD Minimization for Approximate Computing" you develop a great methodology for automatically approximating circuits. I installed the package and I see this command.

However, does the error metric calculation happen within the comb_approx command? As in, is it not a separate command? So if I wanted to run it on two circuits (an original and an approximated), I cannot do this with CirKit?

This question is mostly about the error rate and average-case error metrics of your paper.

Thanks once again for the great product. The file is attached for reference.
RCA_N16.txt

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