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NUCLEO_F756ZG / mbedTLS: MD5 hw acceleration #4156

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merged 14 commits into from
Jun 13, 2017

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@adustm adustm commented Apr 11, 2017

Description

mbedtls_MD5 hw acceleration for NUCLEO_F756ZG

Status

READY

Related PRs

This PR is the same as #3956, but based on another mbed-os branch

** This PR needs #3954 + #3950 to be merged first**

Steps to test or reproduce

same as in #3950

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adustm commented Apr 11, 2017

@sg-

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@RonEld RonEld left a comment

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I have done my review, and added some comments\questions


#define MBEDTLS_MD5_C
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Please remove

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ok

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@adustm I am not sure this was removed

*/
void mbedtls_md5_update( mbedtls_md5_context *ctx, const unsigned char *input, size_t ilen )
{
HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)input, ilen);
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what if ilen < 64?
Don't you need some accumulation buffer like in the SHA1 use case? Is this done in HAL_HASH_MD5_Accumulate?

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I'll check that

{
__HAL_HASH_START_DIGEST();

HAL_HASH_MD5_Finish(&ctx->hhash_md5, output, 10);
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why 10? Is this hex value?

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@RonEld RonEld Apr 13, 2017

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Disregard, I understand now this is timeout value, and not length

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This is a timeout value.

*/
typedef struct
{
uint32_t total[2]; /*!< number of bytes processed */
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where is this referenced?

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ok to remove. They are unused

typedef struct
{
uint32_t total[2]; /*!< number of bytes processed */
uint32_t state[4]; /*!< intermediate digest state */
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where is this referenced?

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ok to remove. They are unused

{
uint32_t total[2]; /*!< number of bytes processed */
uint32_t state[4]; /*!< intermediate digest state */
unsigned char buffer[64]; /*!< data block being processed */
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where is this referenced?

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ok to remove. They are unused


#if defined(MBEDTLS_MD5_ALT)
#include "mbedtls/platform.h"
#include "mbedtls/config.h"
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is this include needed? isn't it already included in md5.h and md5.c before the inclusion of md5_alt.h?
Please check what header files inclusions are needed in this header files, and what should be moved to md5_alt.c file

#endif

#ifdef __cplusplus
extern "C" {
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can be removed

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ok

#endif

#ifdef __cplusplus
}
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can be removed

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ok

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Accidently commented here instead of 4157

@adustm adustm force-pushed the STM_md5_f756zg branch 2 times, most recently from 00f86c1 to 13561ef Compare May 15, 2017 12:51
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sg- commented May 16, 2017

/morph test-nightly

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Result: FAILURE

Your command has finished executing! Here's what you wrote!

/morph test-nightly

Output

mbed Build Number: 230

Test failed!

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adustm commented May 23, 2017

Hello, could you let me know what is wrong with the

Cam-CI uvisor Build & Test

, please ?
Thanks in advance
Armelle

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adustm commented May 23, 2017

Hello @yanesca, you have been added as a reviewer by @0xc0170 .
Could you also review this PR, please ?

Thanks in advance,
Armelle

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one small comment

void mbedtls_md5_finish( mbedtls_md5_context *ctx, unsigned char output[16] );

/* Internal use */
void mbedtls_md5_process( mbedtls_md5_context *ctx, const unsigned char data[64] );
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change 64 to MBEDTLS_MD5_BLOCK_SIZE

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According to my interpretation of the HAL documentation, mbedtls_md5_update will not work with input buffers of size that is not a multiple of 64. This could be tested with ad hoc tests, or by performing an RSA PSS signature off-device and checking it on the device.

mbedtls_md5_process(ctx, ctx->sbuf);
// now process every input as long as it is %4 bytes
size_t iter = currentlen / 4;
HAL_HASH_MD5_Accumulate(&ctx->hhash_md5, (uint8_t *)(input+MBEDTLS_MD5_BLOCK_SIZE-ctx->sbuf_len), (iter*4));

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The documentation of HAL_HASH_MD5_Accumulate states:

If the Size is multiple of 64 bytes, appending the input buffer is possible.
If the Size is not multiple of 64 bytes, the padding is managed by hardware and appending the input buffer is no more possible.

So I don't think this code is correct: it can process blocks of 4 bytes. My understanding is that every block other than the last block must have a size that is a multiple of 64.

The documentation is slightly different for SHA-1 and SHA-256, see https://github.com/ARMmbed/mbed-os/pull/4159/files#r118019139

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Same come comment as @gilles-peskine-arm. Otherwise same comments as #4162.

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adustm commented Jun 12, 2017

Hello,
@yanesca, @gilles-peskine-arm, could you approve this PR or let me know whait is missing ?

@0xc0170 do you know what is failing in the Cam-CI uvisor Build & Test script ?
Kind regards
Armelle

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0xc0170 commented Jun 12, 2017

@0xc0170 do you know what is failing in the Cam-CI uvisor Build & Test script ?

It's uvisor related issue , @Patater can you please help?

Anyway, this is sent to workshop branch, the most of work was already pushed to master, shall this be rebased and redirected to master? @sbutcher-arm @sg- what do you think ? We got couple of similar PR.

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Patater commented Jun 12, 2017

@0xc0170

If this PR is rebased and redirected to master, the uVisor CI will have a chance of passing. As of now, the workshop branch is too old to work with uVisor CI due to uVisor tests needing RTX5.

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adustm commented Jun 13, 2017

Hello,
I can try to rebase on master for this PR and we'll see if it works before I do the same for the 6 other PRs.
Kind regards
Armelle

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adustm commented Jun 13, 2017

Hello @0xc0170 @Patater

I cannot rebase, as the workshop branch is far from the master branch. You first have to merge the workshop branch in the master branch.
At least I am missing PR #4161 in the master branch
Do you agree ?

Or would it be acceptable that you bypass the Cam-CI uvisor Build & Test check when you merge in a branch that is not the master ? This check will be repassed when the workshop branch will be merged into the master branch anyway?

Kind regards

@0xc0170 0xc0170 merged commit bad936c into ARMmbed:mbed-os-workshop-17q2 Jun 13, 2017
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adustm commented Jun 23, 2017

Hello @adbridge @0xc0170
Any idea when this will be integrated in the master branch ?

cc @screamerbg

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@adustm This PR needs to be redirected to master and then rebased once done (it is still raised against the workshop branch.)

@adustm adustm deleted the STM_md5_f756zg branch October 11, 2018 09:18
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9 participants