Nucleo-F070RB It doesn't work when use internal clock #4390
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@mickeyln can you please sign https://developer.mbed.org/contributor_agreement/ ? |
adustm
approved these changes
May 29, 2017
| @@ -450,7 +450,7 @@ uint8_t SetSysClock_PLL_HSI(void) | |||
| RCC_OscInitStruct.LSIState = RCC_LSI_OFF; | |||
| RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; | |||
| RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; // HSI div 2 | |||
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Hello, could you move the comment to the line you modified, please ?
Otherwise looks good to me.
Bump, please can you? |
0xc0170
approved these changes
Jun 12, 2017
sg-
changed the title
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I had signed the Agreement. |
What is your nick on developer mbed page? I can't locate We would like to progress with this patch |
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https://developer.mbed.org/users/MickeyLin/ |
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/morph test |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
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Description
Nucleo-F070RB have a wrong divisor when it initial the clock.
Status
READY
Migrations
If this PR changes any APIs or behaviors, give a short description of what API users should do when this PR is merged.
NO
Steps to test or reproduce
Run display message to UART
Fixes #4361