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Stack switching: stack_chain field in VMContext #10265

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15 changes: 14 additions & 1 deletion crates/environ/src/vmoffsets.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
// gc_heap_bound: *mut u8,
// gc_heap_data: *mut T, // Collector-specific pointer
// type_ids: *const VMSharedTypeIndex,
// stack_chain: *const StackChainCell,
//
// // Variable-width fields come after the fixed-width fields above. Place
// // memory-related items first as they're some of the most frequently
Expand All @@ -29,8 +30,10 @@
// imported_functions: [VMFunctionImport; module.num_imported_functions],
// imported_tables: [VMTableImport; module.num_imported_tables],
// imported_globals: [VMGlobalImport; module.num_imported_globals],
// imported_tags: [VMTagImport; module.num_imported_tags],
// tables: [VMTableDefinition; module.num_defined_tables],
// globals: [VMGlobalDefinition; module.num_defined_globals],
// tags: [VMTagDefinition; module.num_defined_tags],
// func_refs: [VMFuncRef; module.num_escaped_funcs],
// }

Expand Down Expand Up @@ -295,12 +298,22 @@ pub trait PtrSize {
self.vmctx_gc_heap_data() + self.size()
}

/// The offset of the `stack_chain` field.
/// This field stores a pointer into the `StoreOpauqe`, to a value of type
/// `crate::stack_switching::StackChain`.
// FIXME(#10248) This field is not actually in use, yet. It is only here for
// future use in a subsequent stack-switching PR.
#[inline]
fn vmctx_stack_chain(&self) -> u8 {
self.vmctx_type_ids_array() + self.size()
}

/// The end of statically known offsets in `VMContext`.
///
/// Data after this is dynamically sized.
#[inline]
fn vmctx_dynamic_data_start(&self) -> u8 {
self.vmctx_type_ids_array() + self.size()
self.vmctx_stack_chain() + self.size()
}
}

Expand Down
6 changes: 3 additions & 3 deletions tests/all/pooling_allocator.rs
Original file line number Diff line number Diff line change
Expand Up @@ -640,15 +640,15 @@ fn instance_too_large() -> Result<()> {
configured maximum of 16 bytes; breakdown of allocation requirement:

* 76.19% - 256 bytes - instance state management
* 21.43% - 72 bytes - static vmctx data
* 23.81% - 80 bytes - static vmctx data
"
} else {
"\
instance allocation for this module requires 240 bytes which exceeds the \
instance allocation for this module requires 240 bytes which exceeds the \
configured maximum of 16 bytes; breakdown of allocation requirement:

* 66.67% - 160 bytes - instance state management
* 30.00% - 72 bytes - static vmctx data
* 33.33% - 80 bytes - static vmctx data
"
};
match Module::new(&engine, "(module)") {
Expand Down
8 changes: 4 additions & 4 deletions tests/disas/basic-wat-test.wat
Original file line number Diff line number Diff line change
Expand Up @@ -14,17 +14,17 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: i32):
;; @0021 v5 = uextend.i64 v2
;; @0021 v6 = load.i64 notrap aligned readonly checked v0+80
;; @0021 v6 = load.i64 notrap aligned readonly checked v0+88
;; @0021 v7 = iadd v6, v5
;; @0021 v8 = load.i32 little heap v7
;; @0026 v9 = uextend.i64 v3
;; @0026 v10 = load.i64 notrap aligned readonly checked v0+80
;; @0026 v10 = load.i64 notrap aligned readonly checked v0+88
;; @0026 v11 = iadd v10, v9
;; @0026 v12 = load.i32 little heap v11
;; @0029 v13 = iadd v8, v12
Expand Down
16 changes: 8 additions & 8 deletions tests/disas/duplicate-loads-dynamic-memory.wat
Original file line number Diff line number Diff line change
Expand Up @@ -27,13 +27,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0057 v6 = load.i64 notrap aligned v0+88
;; @0057 v8 = load.i64 notrap aligned checked v0+80
;; @0057 v6 = load.i64 notrap aligned v0+96
;; @0057 v8 = load.i64 notrap aligned checked v0+88
;; @0057 v5 = uextend.i64 v2
;; @0057 v7 = icmp ugt v5, v6
;; @0057 v10 = iconst.i64 0
Expand All @@ -51,13 +51,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0064 v6 = load.i64 notrap aligned v0+88
;; @0064 v8 = load.i64 notrap aligned checked v0+80
;; @0064 v6 = load.i64 notrap aligned v0+96
;; @0064 v8 = load.i64 notrap aligned checked v0+88
;; @0064 v5 = uextend.i64 v2
;; @0064 v7 = icmp ugt v5, v6
;; @0064 v12 = iconst.i64 0
Expand Down
12 changes: 6 additions & 6 deletions tests/disas/duplicate-loads-static-memory.wat
Original file line number Diff line number Diff line change
Expand Up @@ -22,12 +22,12 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0057 v6 = load.i64 notrap aligned readonly checked v0+80
;; @0057 v6 = load.i64 notrap aligned readonly checked v0+88
;; @0057 v5 = uextend.i64 v2
;; @0057 v7 = iadd v6, v5
;; @0057 v8 = load.i32 little heap v7
Expand All @@ -42,12 +42,12 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0064 v6 = load.i64 notrap aligned readonly checked v0+80
;; @0064 v6 = load.i64 notrap aligned readonly checked v0+88
;; @0064 v5 = uextend.i64 v2
;; @0064 v7 = iadd v6, v5
;; @0064 v8 = iconst.i64 1234
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -40,16 +40,16 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0047 v7 = load.i64 notrap aligned v0+88
;; @0047 v7 = load.i64 notrap aligned v0+96
;; @0047 v6 = uextend.i64 v2
;; @0047 v8 = icmp ugt v6, v7
;; @0047 trapnz v8, heap_oob
;; @0047 v9 = load.i64 notrap aligned checked v0+80
;; @0047 v9 = load.i64 notrap aligned checked v0+88
;; @0047 v10 = iadd v9, v6
;; @0047 v11 = load.i32 little heap v10
;; @004c v17 = iconst.i64 4
Expand All @@ -73,16 +73,16 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32):
;; @005d v7 = load.i64 notrap aligned v0+88
;; @005d v7 = load.i64 notrap aligned v0+96
;; @005d v6 = uextend.i64 v2
;; @005d v8 = icmp ugt v6, v7
;; @005d trapnz v8, heap_oob
;; @005d v9 = load.i64 notrap aligned checked v0+80
;; @005d v9 = load.i64 notrap aligned checked v0+88
;; @005d v10 = iadd v9, v6
;; @005d store little heap v3, v10
;; @0064 v16 = iconst.i64 4
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -36,13 +36,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0047 v7 = load.i64 notrap aligned v0+88
;; @0047 v9 = load.i64 notrap aligned checked v0+80
;; @0047 v7 = load.i64 notrap aligned v0+96
;; @0047 v9 = load.i64 notrap aligned checked v0+88
;; @0047 v6 = uextend.i64 v2
;; @0047 v8 = icmp ugt v6, v7
;; @0047 v11 = iconst.i64 0
Expand Down Expand Up @@ -71,13 +71,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: i32, v4: i32, v5: i32):
;; @005d v7 = load.i64 notrap aligned v0+88
;; @005d v9 = load.i64 notrap aligned checked v0+80
;; @005d v7 = load.i64 notrap aligned v0+96
;; @005d v9 = load.i64 notrap aligned checked v0+88
;; @005d v6 = uextend.i64 v2
;; @005d v8 = icmp ugt v6, v7
;; @005d v11 = iconst.i64 0
Expand Down
6 changes: 3 additions & 3 deletions tests/disas/f32-load.wat
Original file line number Diff line number Diff line change
Expand Up @@ -11,13 +11,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @002e v4 = uextend.i64 v2
;; @002e v5 = load.i64 notrap aligned readonly checked v0+80
;; @002e v5 = load.i64 notrap aligned readonly checked v0+88
;; @002e v6 = iadd v5, v4
;; @002e v7 = load.f32 little heap v6
;; @0031 jump block1
Expand Down
6 changes: 3 additions & 3 deletions tests/disas/f32-store.wat
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: f32):
;; @0031 v4 = uextend.i64 v2
;; @0031 v5 = load.i64 notrap aligned readonly checked v0+80
;; @0031 v5 = load.i64 notrap aligned readonly checked v0+88
;; @0031 v6 = iadd v5, v4
;; @0031 store little heap v3, v6
;; @0034 jump block1
Expand Down
6 changes: 3 additions & 3 deletions tests/disas/f64-load.wat
Original file line number Diff line number Diff line change
Expand Up @@ -13,13 +13,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @002e v4 = uextend.i64 v2
;; @002e v5 = load.i64 notrap aligned readonly checked v0+80
;; @002e v5 = load.i64 notrap aligned readonly checked v0+88
;; @002e v6 = iadd v5, v4
;; @002e v7 = load.f64 little heap v6
;; @0031 jump block1
Expand Down
6 changes: 3 additions & 3 deletions tests/disas/f64-store.wat
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: f64):
;; @0031 v4 = uextend.i64 v2
;; @0031 v5 = load.i64 notrap aligned readonly checked v0+80
;; @0031 v5 = load.i64 notrap aligned readonly checked v0+88
;; @0031 v6 = iadd v5, v4
;; @0031 store little heap v3, v6
;; @0034 jump block1
Expand Down
6 changes: 3 additions & 3 deletions tests/disas/fibonacci.wat
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,8 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned readonly checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned readonly checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64):
Expand All @@ -55,7 +55,7 @@
;; block2:
;; @0056 v16 = iconst.i32 0
;; @005a v17 = uextend.i64 v16 ; v16 = 0
;; @005a v18 = load.i64 notrap aligned readonly checked v0+80
;; @005a v18 = load.i64 notrap aligned readonly checked v0+88
;; @005a v19 = iadd v18, v17
;; @005a store.i32 little heap v11, v19
;; @005d jump block1
Expand Down
12 changes: 6 additions & 6 deletions tests/disas/fixed-size-memory.wat
Original file line number Diff line number Diff line change
Expand Up @@ -25,16 +25,16 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32, v3: i32):
;; @0041 v4 = uextend.i64 v2
;; @0041 v5 = iconst.i64 0x0001_0000
;; @0041 v6 = icmp uge v4, v5 ; v5 = 0x0001_0000
;; @0041 trapnz v6, heap_oob
;; @0041 v7 = load.i64 notrap aligned checked v0+80
;; @0041 v7 = load.i64 notrap aligned checked v0+88
;; @0041 v8 = iadd v7, v4
;; @0041 istore8 little heap v3, v8
;; @0044 jump block1
Expand All @@ -48,16 +48,16 @@
;; gv1 = load.i64 notrap aligned readonly gv0+8
;; gv2 = load.i64 notrap aligned gv1+16
;; gv3 = vmctx
;; gv4 = load.i64 notrap aligned gv3+88
;; gv5 = load.i64 notrap aligned checked gv3+80
;; gv4 = load.i64 notrap aligned gv3+96
;; gv5 = load.i64 notrap aligned checked gv3+88
;; stack_limit = gv2
;;
;; block0(v0: i64, v1: i64, v2: i32):
;; @0049 v4 = uextend.i64 v2
;; @0049 v5 = iconst.i64 0x0001_0000
;; @0049 v6 = icmp uge v4, v5 ; v5 = 0x0001_0000
;; @0049 trapnz v6, heap_oob
;; @0049 v7 = load.i64 notrap aligned checked v0+80
;; @0049 v7 = load.i64 notrap aligned checked v0+88
;; @0049 v8 = iadd v7, v4
;; @0049 v9 = uload8.i32 little heap v8
;; @004c jump block1
Expand Down
8 changes: 4 additions & 4 deletions tests/disas/gc/drc/br-on-cast-fail.wat
Original file line number Diff line number Diff line change
Expand Up @@ -73,14 +73,14 @@
;; @002e brif v30, block8, block2
;;
;; block8:
;; @0034 v32 = load.i64 notrap aligned readonly v0+72
;; @0034 v33 = load.i64 notrap aligned readonly v0+88
;; @0034 v32 = load.i64 notrap aligned readonly v0+80
;; @0034 v33 = load.i64 notrap aligned readonly v0+96
;; @0034 call_indirect sig1, v32(v33, v0)
;; @0036 return
;;
;; block2:
;; @0038 v35 = load.i64 notrap aligned readonly v0+96
;; @0038 v36 = load.i64 notrap aligned readonly v0+112
;; @0038 v35 = load.i64 notrap aligned readonly v0+104
;; @0038 v36 = load.i64 notrap aligned readonly v0+120
;; @0038 call_indirect sig2, v35(v36, v0)
;; @003a return
;; }
8 changes: 4 additions & 4 deletions tests/disas/gc/drc/br-on-cast.wat
Original file line number Diff line number Diff line change
Expand Up @@ -73,14 +73,14 @@
;; @002f brif v30, block2, block8
;;
;; block8:
;; @0035 v32 = load.i64 notrap aligned readonly v0+72
;; @0035 v33 = load.i64 notrap aligned readonly v0+88
;; @0035 v32 = load.i64 notrap aligned readonly v0+80
;; @0035 v33 = load.i64 notrap aligned readonly v0+96
;; @0035 call_indirect sig1, v32(v33, v0)
;; @0037 return
;;
;; block2:
;; @0039 v35 = load.i64 notrap aligned readonly v0+96
;; @0039 v36 = load.i64 notrap aligned readonly v0+112
;; @0039 v35 = load.i64 notrap aligned readonly v0+104
;; @0039 v36 = load.i64 notrap aligned readonly v0+120
;; @0039 call_indirect sig2, v35(v36, v0)
;; @003b return
;; }
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