Add ARM encoding group IF_SVE_CI_3A #97808
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsAdds support for emitting trn[1/2], zip[1/2] and uzp[1/2] instructions. Matching capstone: Contribute towards #94549.
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@dotnet-policy-service agree company="Arm" |
This was referenced Feb 1, 2024
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@a74nh @kunalspathak @dotnet/arm64-contrib |
amanasifkhalid
approved these changes
Feb 2, 2024
| @@ -1089,6 +1089,14 @@ void emitter::emitInsSanityCheck(instrDesc* id) | |||
| assert(isValidUimm4From1(emitGetInsSC(id))); | |||
| break; | |||
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| case IF_SVE_CI_3A: // ........xx..MMMM .......NNNN.DDDD -- SVE permute predicate elements | |||
| elemsize = id->idOpSize(); | |||
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Doesn't have to be done for this PR, but we should come back and clean up all these unused elemsize locals (and maybe update the tool to not emit them @kunalspathak).
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Adds support for emitting trn[1/2], zip[1/2] and uzp[1/2] instructions.
Matching capstone:
Contribute towards #94549.