Add ARM64 encodings for group IF_SVE_BH_3A,3B,3B_A #98764
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsCovers encodings for a few SVE variants of the Matching capstone output: Contributing towards #94549.
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@a74nh @kunalspathak @dotnet/arm64-contrib |
a74nh
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Feb 22, 2024
src/coreclr/jit/emitarm64.cpp
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| ssize_t imm, | ||
| insOpts opt /* = INS_OPTS_NONE */, | ||
| emitAttr attrReg2 /* = EA_UNKNOWN */) | ||
| void emitter::emitIns_R_R_R_I(instruction ins, |
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This change isn't needed as your not touching this function otherwise.
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@snickolls-arm - can you please pull the latest |
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superpmi failures seems to be infra issue. |
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Covers encodings for a few SVE variants of the
adrinstruction.Matching capstone output:
Contributing towards #94549.