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Merging r339674:
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r339674 | aemerson | 2018-08-14 14:04:25 +0200 (Tue, 14 Aug 2018) | 3 lines

[GlobalISel][IRTranslator] Fix a bug in handling repeating struct types during argument lowering.

Differential Revision: https://reviews.llvm.org/D49442
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_70@340358 91177308-0d34-0410-b5e6-96231b3b80d8
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zmodem committed Aug 21, 2018
1 parent fbe3346 commit 57aa5d9
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1 change: 1 addition & 0 deletions include/llvm/CodeGen/GlobalISel/IRTranslator.h
Original file line number Diff line number Diff line change
Expand Up @@ -232,6 +232,7 @@ class IRTranslator : public MachineFunctionPass {

/// Returns true if the value should be split into multiple LLTs.
/// If \p Offsets is given then the split type's offsets will be stored in it.
/// If \p Offsets is not empty it will be cleared first.
bool valueIsSplit(const Value &V,
SmallVectorImpl<uint64_t> *Offsets = nullptr);

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2 changes: 2 additions & 0 deletions lib/CodeGen/GlobalISel/IRTranslator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1435,6 +1435,8 @@ void IRTranslator::finishPendingPhis() {
bool IRTranslator::valueIsSplit(const Value &V,
SmallVectorImpl<uint64_t> *Offsets) {
SmallVector<LLT, 4> SplitTys;
if (Offsets && !Offsets->empty())
Offsets->clear();
computeValueLLTs(*DL, *V.getType(), SplitTys, Offsets);
return SplitTys.size() > 1;
}
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@@ -0,0 +1,15 @@
; RUN: llc -O0 -o - -verify-machineinstrs %s | FileCheck %s
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

; Check we don't crash due to encountering the same struct param type twice.
; CHECK-LABEL: param_two_struct
; CHECK: add
; CHECK: ret
define i64 @param_two_struct([2 x i64] %t.coerce, [2 x i64] %s.coerce) {
entry:
%t.coerce.fca.0.extract = extractvalue [2 x i64] %t.coerce, 0
%s.coerce.fca.1.extract = extractvalue [2 x i64] %s.coerce, 1
%add = add nsw i64 %s.coerce.fca.1.extract, %t.coerce.fca.0.extract
ret i64 %add
}

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