[CPU] FullyConnected acceleration with 8bit weights decompression on SPR #19111
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dmitry-gorokhov
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xuchen-intel
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Aug 11, 2023
| // As workaround we assume that all AMX IP implementations use equal internal IC block size for weights layout | ||
| // and prepack runtime attributes accordingly for better performance | ||
| bool withAMX = selected_pd->getImplementationType() & impl_desc_type::amx; | ||
| int icBlock = withAMX ? 2 : 1; |
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Could you please elaborate a little about the reason that icBlock is set to be 2 here and in onednn revision, when withAMX is true?
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Details:
-- nodes: FullyConnected
-- weights compression: unsigned 8bit
-- isa: AMX
Tickets: