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RFC: SystemVerilog extension in the verilog parser #33

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@vhda vhda commented May 30, 2014

This request serves only as a platform for discussing the SystemVerilog extension in the verilog parser.
At the moment I'd like to open the following two discussion points:

  1. http://sourceforge.net/p/ctags/support-requests/17/ - The person who opened this request did a fine job in the creation of a SystemVerilog parser. It would be nice if he could be invited to participate in this discussion to see if we could work together to merge our efforts.
  2. Class objects - I'd like to know if you have any suggestions on how the parser could be aware of class declarations and dynamically identifying of which class an object instance is.

Thanks,
Vitor

Seth Kingsley and others added 27 commits March 9, 2011 16:32
…nd a

hash.  For instance, MyClass#init.  This is useful for disambiguation, similar
to how the C language tag Mfilename points to main() in filename.
… tags for

methods.  This makes it much easier for me to jump to tags in Vim using ^] on
the current word.
Support the s: and fx: namespaces.
Corrected parsing of other namespace objects.  They will not be tagged, but
they will be parsed correctly.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@755 c5d04d22-be80-434c-894e-aa346cc9e8e8
When parsing an Oracle package, the function prototypes did not have the
appropriate scope added to the tags.
Test case used is: test/bug2961855.sql.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@756 c5d04d22-be80-434c-894e-aa346cc9e8e8
The scope changes unfortunately also picked up OWNER and CREATOR names of
functions and procedures.  So the scope changes should only be picked up if
we are inside a PACKAGE first.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@760 c5d04d22-be80-434c-894e-aa346cc9e8e8
git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@761 c5d04d22-be80-434c-894e-aa346cc9e8e8
Vim parser did not handle an invalid 'command' format and hung".
Now it handles and checks for these formats:
   command.
   command!.
   comma!.
   comma! ThisIsValid

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@762 c5d04d22-be80-434c-894e-aa346cc9e8e8
var x = 1;
var y = [];
var z = {};

Only x and y are detected - z is ignored,
despite this being perfectly valid syntax
(and quite common, when initialising
a variable for use as a hash table).

[It's equivalent to z = new Object(), in a
similar fashion to y = [] being equivalent
to y = new Array() ].

As far as I can tell, the cause seems to be that
object literals are not being considered as valid
for the right hand side of an assignment.

Now, global variables for z is generated for the release after 5.8.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@763 c5d04d22-be80-434c-894e-aa346cc9e8e8
git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@770 c5d04d22-be80-434c-894e-aa346cc9e8e8
git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@775 c5d04d22-be80-434c-894e-aa346cc9e8e8
Apply patch from Colomban Wendling to parse Python lambda functions
(thanks) - modified to only parse toplevel or class member lambdas.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@776 c5d04d22-be80-434c-894e-aa346cc9e8e8
When checking for literal strings to ignore, consider also unicode, binary and raw strings.

git-svn-id: https://ctags.svn.sourceforge.net/svnroot/ctags/trunk@777 c5d04d22-be80-434c-894e-aa346cc9e8e8
@vhda vhda changed the title Systemverilog RFC: SystemVerilog extension in the verilog parser May 30, 2014
@masatake masatake mentioned this pull request May 30, 2014
b4n and others added 18 commits October 29, 2014 23:49
This reduces the size of the executable with 50%.
Note that this does not affect dctags.exe, the debug build
…h breaks the target command execution

Signed-off-by: Masatake YAMATO <[email protected]>
Also fixes context string generation.
Parser was skipping to known start/end-of-statement characters before
starting to find tags. When using named blocks, something like the
following can happen:

initial begin : myblock
  reg  var;

If the parser waits for ; to start searching for a new tag, then "var"
is missed.
Include a `define with value and a comma separated list of parameters.
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vhda commented Nov 6, 2014

This pull request no longer makes sense.

@vhda vhda closed this Nov 6, 2014
@vhda vhda deleted the systemverilog branch December 9, 2014 23:38
masatake pushed a commit to masatake/ctags that referenced this pull request Mar 12, 2020
masatake added a commit to masatake/ctags that referenced this pull request Jun 10, 2021
43934f352 Improve makefiles
29a2a1b06 Support gcc for IBM AIX
53aefcb47 Update README.md
6035daaba Change macro to check for size_t byte size
6015afca6 Fix universal-ctags#34
dfc33e6bf Merge pull request universal-ctags#33 from dolik-rce/test-improvements
8176c6492 fix uncrustify version check
fa144ef7c properly quote load statements
df95cbde7 refactor test utils
1ff5f9100 test --ascii option
e54a94c03 avoid copying calc.peg into test directories
a6a7ef719 test grammar dump (--debug option)
f1323e5ec display coverage
223b264fa allow options in CC environment variable

git-subtree-dir: misc/packcc
git-subtree-split: 43934f35254c08f0827801f80bbbec0e03c69fe0
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9 participants